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參數(shù)資料
| 型號： | CY62128ELL-55ZAXE |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 1-Mbit (128K x 8) Static RAM |
| 中文描述： | 128K X 8 STANDARD SRAM, 55 ns, PDSO32 |
| 封裝： | 8 X 13.40 MM, LEAD FREE, STSOP-32 |
| 文件頁數(shù)： | 11/11頁 |
| 文件大小： | 862K |
| 代理商： | CY62128ELL-55ZAXE |
Document #: 38-05485 Rev. *E
Page 11 of 11
CY62128E MoBL
Document History Page
Document Title: CY62128E MoBL
1-Mbit (128K x 8) Static RAM
Document Number: 38-05485
Issue DateChange
**
203120
See ECN
*A
299472
See ECN
REV.
ECN NO.
Description of Change
AJU
SYT
New data sheet
Converted from Advance Information to Preliminary
Changed t
OHA
from 6 ns to 10 ns for both 35 ns and 45 ns, respectively
Changed t
DOE
from 15 ns to 18 ns for 35 ns speed bin
Changed t
HZOE
, t
HZWE
from 12 and 15 ns to 15 and 18 ns for the 35 and 45 ns
speed bins, respectively
Changed t
HZCE
from 12 and 15 ns to 18 and 22 ns for the 35 and 45 ns speed bins,
respectively
Changed t
SCE
from 25 and 40 ns to 30 and 35 ns for the 35 and 45 ns speed bins,
respectively
Changed t
SD
from 15 and 20 ns to 18 and 22 ns for the 35 and 45 ns speed bins,
respectively
Added Pb-free package information
Added footnote #9
Changed operating range for SOIC package from Commercial to Industrial
Modified signal transition time from 5 ns to 3 ns in footnote #11
Changed max of I
SB1
, I
SB2
and I
CCDR
from 1.0
μ
A to 1.5
μ
A
Converted from Preliminary to Final
Included Automotive Range and 55 ns speed bin
Removed 35 ns speed bin
Removed “L” version of CY62128E
Removed Reverse TSOP I package from Product offering
Changed I
CC (Typ)
from 8 mA to 11 mA and I
CC (max)
from 12 mA to 16 mA for f = f
max
Changed I
CC (max)
from 1.5 mA to 2.0 mA for f = 1 MHz
Removed I
SB1
DC Specs from Electrical characteristics table
Changed I
SB2 (max)
from 1.5
μ
A to 4
μ
A
Changed I
SB2 (Typ)
from 0.5
μ
A to 1
μ
A
Changed I
CCDR (max)
from 1.5
μ
A to 4
μ
A
Changed the AC Test load Capacitance value from 100 pF to 30 pF
Changed t
LZOE
from 3 to 5 ns
Changed t
LZCE
from 6 to 10 ns
Changed t
HZCE
from 22 to 18 ns
Changed t
PWE
from 30 to 35 ns
Changed t
SD
from 22 to 25 ns
Changed t
LZWE
from 6 to 10 ns
Updated the Ordering Information Table
Updated the Block Diagram on page # 1
Added footnote 4 on page 2
Added Automotive-A information
Converted Automotive-E specs to final
Added footnote #9 related to I
SB2
and I
CCDR
Updated Ordering Information table
*B
461631
See ECN
NXR
*C
*D
*E
464721
563144
1024520
See ECN
See ECN
See ECN
NXR
AJU
VKN
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|---|---|
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| CY62136EV30LL-45ZSXI | 2-Mbit (128K x 16) Static RAM |
| CY62136FV30 | 2-Mbit (128K x 16) Static RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62128ELL-55ZAXET | 功能描述:靜態(tài)隨機存取存儲器 1M MOBL ULTRA Lo PWR HI SPD ASYNC 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62128ESL-45SXI | 功能描述:靜態(tài)隨機存取存儲器 1M MOBL ULTRA Lo PWR HI SPD ASYNC 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62128EV30 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1 Mbit (128K x 8) Static RAM |
| CY62128EV30_09 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1 Mbit (128K x 8) Static RAM |
| CY62128EV30_11 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1-Mbit (128 K × 8) Static RAM Typical standby current: 1 μA |
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