參數(shù)資料
型號: CY62127DV30L-70BVI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: Replacement domes; Style: Replacement lens/domes; Color: Red/Yellow/Green/Blue; Diameter: 82; Applicable Model: PES / PEW; Material: Acrylic
中文描述: 64K X 16 STANDARD SRAM, 70 ns, PBGA48
封裝: 6 X 8 MM, 1 MM HEIGHT, VFBGA-48
文件頁數(shù): 7/12頁
文件大小: 384K
代理商: CY62127DV30L-70BVI
CY62127DV30
MoBL
Document #: 38-05229 Rev. *D
Page 7 of 12
Write Cycle No. 1 (WE Controlled)
[14, 15,
19, 20, 21]
Write Cycle No. 2 (CE Controlled)
[14, 15,
19, 20, 21]
Notes:
19.Data I/O is high-impedance if OE = V
.
20.If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
21.During the DON'T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
Switching Waveforms
(continued)
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
ADDRESS
WE
DATA I/O
OE
BHE/BLE
t
BW
DON'T CARE
t
HD
t
SD
t
PWE
t
HA
t
AW
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
ADDRESS
WE
DATA I/O
OE
BHE/BLE
t
BW
t
SA
DON'T CARE
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