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參數資料
| 型號： | CY29948ACT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer |
| 中文描述： | 29948 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 7 X 7 MM, 1 MM HEIGHT, PLASTIC, TQFP-32 |
| 文件頁數： | 3/7頁 |
| 文件大小： | 108K |
| 代理商： | CY29948ACT |
CY29948
Document #: 38-07288 Rev. *B
Page 3 of 7
Maximum Ratings
[2]
Maximum Input Voltage Relative to V
SS
:............. V
SS
–
0.3V
Maximum Input Voltage Relative to V
DD
:.............V
DD
+ 0.3V
Storage Temperature: ................................
–
65
°
C to + 150
°
C
Operating Temperature:................................
–
40
°
C to +85
°
C
Maximum ESD protection...............................................2 kV
Maximum Power Supply:................................................5.5V
Maximum Input Current: ............................................±20 mA
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any volt-
age higher than the maximum rated voltages to this circuit. For
proper operation, V
in
and V
out
should be constrained to the
range:
V
SS
< (V
in
or V
out
) < V
DD
Unused inputs must always be tied to an appropriate logic volt-
age level (either V
SS
or V
DD
).
Notes:
2.
3.
4.
Multiple Supplies:
The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
Inputs have pull-up/pull-down resistors that effect input current.
The V
is the difference from the most positive side of the differential input signal. Normal operation is obtained when the
“
High
”
input is within the V
CMR
range and the input lies within the V
specification.
Driving series or parallel terminated 50
(or 50
to V
DD
/2) transmission lines.
5.
DC Parameters:
V
DD
= V
DDC
= 3.3V ±10% or 2.5V ±5%, Over the specified temperature range
Parameter
V
IL
Description
Conditions
Min.
1.49
1.10
V
SS
2.135
1.75
2.0
Typ.
Max.
1.825
1.45
0.8
2.42
2.0
V
DD
–
100
100
1000
Unit
V
Input Low Voltage
V
DD
= 3.3V, PECL_CLK single ended
V
DD
= 2.5V, PECL_CLK single ended
All other inputs
V
DD
= 3.3V, PECL_CLK single ended
V
DD
= 2.5V, PECL_CLK single ended
All other inputs
V
IH
Input High Voltage
V
I
IL
I
IH
V
PP
Input Low Current
[3]
Input High Current
[3]
Peak-to-Peak Input Voltage
PECL_CLK
Common Mode Range
[4]
PECL_CLK
μA
300
mV
V
CMR
V
DD
= 3.3V
V
DD
= 2.5V
I
OL
= 20 mA
I
OH
=
–
20 mA, V
DD
= 3.3V
I
OH
=
–
20 mA, V
DD
= 2.5V
V
DD
–
2.0
V
DD
–
1.2
V
DD
–
0.6
V
DD
–
0.6
0.4
V
V
OL
V
OH
Output Low Voltage
[5]
Output High Voltage
[5]
V
V
2.5
1.8
I
DDQ
Quiescent Supply
Current
Dynamic Supply
Current
5
7
mA
I
DD
V
DD
= 3.3V, Outputs @ 100 MHz,
CL = 30 pF
V
DD
= 3.3V, Outputs @ 160 MHz,
CL = 30 pF
V
DD
= 2.5V, Outputs @ 100 MHz,
CL = 30 pF
V
DD
= 2.5V, Outputs @ 160 MHz,
CL = 30 pF
V
DD
= 3.3V
V
DD
= 2.5V
180
mA
270
125
190
Zout
Output Impedance
12
14
15
18
4
18
22
C
in
Input Capacitance
pF
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相關代理商/技術參數 |
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| CY29948AI | 功能描述:IC CLOCK BUFFER MUX 2:12 32-TQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:- 標準包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復用器 電路數:1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| CY29948AIT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer |
| CY29948AXC | 功能描述:時鐘驅動器及分配 2.5V or /3.3V 200MHz COM RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| CY29948AXCT | 功能描述:時鐘驅動器及分配 2.5V or /3.3V 200MHz COM RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| CY29948AXI | 功能描述:時鐘驅動器及分配 2.5V or /3.3V 200MHz IND RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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