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參數(shù)資料
| 型號： | CY29947AI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 2.5V or 3.3V, 200-MHz, 1:9 Clock Distribution Buffer |
| 中文描述： | LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 7 X 7 MM, 1 MM HEIGHT, PLASTIC, TQFP-32 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 103K |
| 代理商： | CY29947AI |
2.5V or 3.3V, 200-MHz, 1:9 Clock Distribution Buffer
CY29947
Cypress Semiconductor Corporation
Document #: 38-07287 Rev. *C
3901 North First Street
San Jose
CA 95134
Revised December 22, 2002
408-943-2600
47
Features
2.5V or 3.3V operation
200-MHz clock support
LVCMOS-/LVTTL-compatible inputs
9 clock outputs: drive up to 18 clock lines
Synchronous Output Enable
Output three-state control
250 ps max. output-to-output skew
Pin compatible with MPC947, MPC9447
Available in Industrial and Commercial temp. range
32-pin TQFP package
Description
The CY29947 is a low-voltage 200-MHz clock distribution buff-
er with the capability to select one of two LVCMOS/LVTTL
compatible clock inputs. The two clock sources can be used
to provide for a test clock as well as the primary system clock.
All other control inputs are LVCMOS/LVTTL compatible. The 9
outputs are LVCMOS or LVTTL compatible and can drive 50
series or parallel terminated transmission lines.For series ter-
minated transmission lines, each output can drive one or two
traces giving the device an effective fanout of 1:18. The out-
puts can also be three-stated via the three-state input TS#.
Low output-to-output skews make the CY29947 an ideal clock
distribution buffer for nested clock trees in the most demand-
ing of synchronous systems.
The CY29947 also provides a synchronous output enable in-
put for enabling or disabling the output clocks. Since this input
is internally synchronized to the input clock, potential output
glitching or runt pulse generation is eliminated.
Block Diagram
Pin Configuration
0
1
TCLK1
TCLK_SEL
SYNC_OE
TS#
VDD
VDDC
9
Q0-Q8
TCLK0
CY29947
V
V
Q
V
Q
V
Q
V
V
V
Q
V
Q
V
Q
V
VSS
Q3
VDDC
Q4
VSS
Q5
VDDC
VSS
VSS
TCLK_SEL
TCLK0
TCLK1
SYNC_OE
TS#
VDD
VSS
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
1
1
1
1
1
1
1
3
3
3
2
2
2
2
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY29947AIT | 2.5V or 3.3V, 200-MHz, 1:9 Clock Distribution Buffer |
| CY29948 | 2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer |
| CY29948AC | 2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer |
| CY29948ACT | 2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer |
| CY29948AI | 2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY29947AIT | 制造商:Cypress Semiconductor 功能描述:Clock Driver 2-IN LVCMOS/LVTTL 32-Pin TQFP T/R |
| CY29947AXC | 功能描述:時鐘驅(qū)動器及分配 2.5V or 3.3V 200MHz COM RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| CY29947AXCT | 功能描述:時鐘驅(qū)動器及分配 2.5V or 3.3V 200MHz COM RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| CY29947AXI | 功能描述:時鐘驅(qū)動器及分配 2.5V or 3.3V 200MHz IND RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| CY29947AXIT | 功能描述:時鐘驅(qū)動器及分配 2.5V or 3.3V 200MHz IND RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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