參數(shù)資料
型號: CY28411ZXCT
廠商: Silicon Laboratories Inc
文件頁數(shù): 6/18頁
文件大?。?/td> 0K
描述: IC CLOCK CK410M ALVISO 56TSSOP
標(biāo)準(zhǔn)包裝: 2,000
類型: 時(shí)鐘/頻率發(fā)生器
PLL:
主要目的: Intel CPU 服務(wù)器
輸入: LVTTL,晶體
輸出: HCSL,LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 3:19
差分 - 輸入:輸出: 無/是
頻率 - 最大: 133MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 56-TSSOP
包裝: 帶卷 (TR)
其它名稱: SLCY28411ZXCT
CY28411
...................... Document #: 38-07594 Rev. *B Page 14 of 18
AC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
Unit
Crystal
TDC
XIN Duty Cycle
The device will operate reliably with input
duty cycles up to 30/70 but the REF clock
duty cycle will not be within specification
47.5
52.5
%
TPERIOD
XIN Period
When XIN is driven from an external
clock source
69.841
71.0
ns
TR / TF
XIN Rise and Fall Times
Measured between 0.3VDD and 0.7VDD
–10.0
ns
TCCJ
XIN Cycle to Cycle Jitter
As an average over 1-
s duration
500
ps
LACC
Long-term Accuracy
Over 150 ms
300
ppm
CPU at 0.7V
TDC
CPUT and CPUC Duty Cycle
Measured at crossing point VOX
45
55
%
TPERIOD
100-MHz CPUT and CPUC Period
Measured at crossing point VOX
9.997001
10.00300
ns
TPERIOD
133-MHz CPUT and CPUC Period
Measured at crossing point VOX
7.497751
7.502251
ns
TPERIODSS
100-MHz CPUT and CPUC Period, SSC Measured at crossing point VOX
9.997001
10.05327
ns
TPERIODSS
133-MHz CPUT and CPUC Period, SSC Measured at crossing point VOX
7.497751
7.539950
ns
TPERIODAbs
100-MHz CPUT and CPUC Absolute
period
Measured at crossing point VOX
9.912001
10.08800
ns
TPERIODAbs
133-MHz CPUT and CPUC Absolute
period
Measured at crossing point VOX
7.412751
7.587251
ns
TPERIODSSAbs 100-MHz CPUT and CPUC Absolute
period, SSC
Measured at crossing point VOX
9.912001
10.13827
ns
TPERIODSSAbs 133-MHz CPUT and CPUC Absolute
period, SSC
Measured at crossing point VOX
7.412751
7.624950
ns
TCCJ
CPUT/C Cycle to Cycle Jitter
Measured at crossing point VOX
–125
ps
TCCJ2
CPU2_ITP Cycle to Cycle Jitter
Measured at crossing point VOX
–125
ps
TSKEW2
CPU2_ITP to CPU0 Clock Skew
Measured at crossing point VOX
–150
ps
TR / TF
CPUT and CPUC Rise and Fall Times
Measured from VOL = 0.175 to VOH =
0.525V
175
700
ps
TRFM
Rise/Fall Matching
Determined as a fraction of 2*(TR
TF)/(TR + TF)
–20
%
T
R
Rise Time Variation
125
ps
T
F
Fall Time Variation
125
ps
VHIGH
Voltage High
Math averages Figure 14
660
850
mV
VLOW
Voltage Low
Math averages Figure 14
–150
mV
VOX
Crossing Point Voltage at 0.7V Swing
250
550
mV
VOVS
Maximum Overshoot Voltage
VHIGH + 0.3
V
VUDS
Minimum Undershoot Voltage
–0.3
V
VRB
Ring Back Voltage
See Figure 14. Measure SE
0.2
V
SRC
TDC
SRCT and SRCC Duty Cycle
Measured at crossing point VOX
45
55
%
TPERIOD
100-MHz SRCT and SRCC Period
Measured at crossing point VOX
9.997001
10.00300
ns
TPERIODSS
100-MHz SRCT and SRCC Period, SSC Measured at crossing point VOX
9.997001
10.05327
ns
TPERIODAbs
100-MHz SRCT and SRCC Absolute
Period
Measured at crossing point VOX
10.12800
9.872001
ns
TPERIODSSAbs 100-MHz SRCT and SRCC Absolute
Period, SSC
Measured at crossing point VOX
9.872001
10.17827
ns
TSKEW
Any SRCT/C to SRCT/C Clock Skew
Measured at crossing point VOX
–100
ps
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