參數(shù)資料
型號(hào)： CY28411ZXCT
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 15/18頁(yè)
文件大?。?/td> 0K
描述： IC CLOCK CK410M ALVISO 56TSSOP
標(biāo)準(zhǔn)包裝： 2,000
類(lèi)型： 時(shí)鐘/頻率發(fā)生器
PLL： 是
主要目的： Intel CPU 服務(wù)器
輸入： LVTTL，晶體
輸出： HCSL，LVCMOS
電路數(shù)： 1
比率 - 輸入:輸出： 3:19
差分 - 輸入:輸出： 無(wú)/是
頻率 - 最大： 133MHz
電源電壓： 3.135 V ~ 3.465 V
工作溫度： 0°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 56-TFSOP（0.240"，6.10mm 寬）
供應(yīng)商設(shè)備封裝： 56-TSSOP
包裝： 帶卷 (TR)
其它名稱： SLCY28411ZXCT
CY28411
........................ Document #: 38-07594 Rev. *B Page 6 of 18
4
0
SRC4
Allow control of SRC[T/C]4 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
3
0
SRC3
Allow control of SRC[T/C]3 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
2
0
SRC2
Allow control of SRC[T/C]2 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
1
0
SRC1
Allow control of SRC[T/C]1 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
0
SRC0
Allow control of SRC[T/C]0 with assertion of PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Byte 4: Control Register 4
Bit
@Pup
Name
Description
7
0
Reserved
Reserved, Set = 0
6
0
DOT96T/C
DOT_PWRDWN Drive Mode
0 = Driven in PWRDWN, 1 = Hi-Z
5
0
Reserved
Reserved, Set = 0
4
0
PCIF1
Allow control of PCIF1 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
3
0
PCIF0
Allow control of PCIF0 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
2
1
CPU[T/C]2
Allow control of CPU[T/C]2 with assertion of CPU_STP#
0 = Free running, 1 = Stopped with CPU_STP#
1
CPU[T/C]1
Allow control of CPU[T/C]1 with assertion of CPU_STP#
0 = Free running, 1 = Stopped with CPU_STP#
0
1
CPU[T/C]0
Allow control of CPU[T/C]0 with assertion of CPU_STP#
0 = Free running, 1 = Stopped with CPU_STP#
Byte 5: Control Register 5
Bit
@Pup
Name
Description
7
0
SRC[T/C][7:0]
SRC[T/C] Stop Drive Mode
0 = Driven when PCI_STP# asserted,1 = Hi-Z when PCI_STP# asserted
6
0
CPU[T/C]2
CPU[T/C]2 Stop Drive Mode
0 = Driven when CPU_STP# asserted,1 = Hi-Z when CPU_STP# asserted
5
0
CPU[T/C]1
CPU[T/C]1 Stop Drive Mode
0 = Driven when CPU_STP# asserted,1 = Hi-Z when CPU_STP# asserted
4
0
CPU[T/C]0
CPU[T/C]0 Stop Drive Mode
0 = Driven when CPU_STP# asserted,1 = Hi-Z when CPU_STP# asserted
3
0
SRC[T/C][7:0]
SRC[T/C] PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Hi-Z when PD asserted
2
0
CPU[T/C]2
CPU[T/C]2 PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Hi-Z when PD asserted
1
0
CPU[T/C]1
CPU[T/C]1 PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Hi-Z when PD asserted
0
CPU[T/C]0
CPU[T/C]0 PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Hi-Z when PD asserted
Byte 3: Control Register 3 (continued)
Bit
@Pup
Name
Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY28411ZXCT-1 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Generator for Intel Alviso Chipset
CY28412 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Clock Generator for Intel㈢ Grantsdale Chipset
CY28412OC 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Clock Generator for Intel㈢ Grantsdale Chipset
CY28412OCT 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Clock Generator for Intel㈢ Grantsdale Chipset
CY28412OXC 功能描述:IC CLOCK GEN GRANTSDALE 56-SSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類(lèi)型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
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