參數(shù)資料
型號(hào): CY28378OXCT
廠商: Silicon Laboratories Inc
文件頁數(shù): 21/21頁
文件大小: 0K
描述: IC CLOCK CK408/TITAN 845 48SSOP
標(biāo)準(zhǔn)包裝: 1,000
類型: 時(shí)鐘/頻率發(fā)生器
PLL:
主要目的: Intel CPU 服務(wù)器
輸入: 晶體
輸出: HCSL,LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:21
差分 - 輸入:輸出: 無/是
頻率 - 最大: 203MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 帶卷 (TR)
CY28378
........................ Document #: 38-07519 Rev. ** Page 9 of 21
Byte 9
Bit
@Pup
Name
Pin Description
Bit 7
0
48MHz_DRV
48MHz and 24_48MHz clock output drive strength
0 = Normal
1 = High Drive
(Recommend to set to high drive if this output is being used to drive both
USB and SIO devices in Intel Brookdale – G platforms)
Bit 6
0
PCI_DRV
PCI clock output drive strength
0 = Normal
1 = High Drive
Bit 5
0
3V66_DRV
3V66 clock output drive strength
0 = Normal
1 = High Drive
Bit 4
0
Reserved
Bit 3
0
Reserved
Bit 2
0
Reserved
Bit 1
0
Reserved
Bit 0
0
Reserved
Byte 10
Bit
@Pup
Name
Pin Description
Bit 7
0
CPU_Skew2
CPU skew control
000 = Normal
001 = –150 ps
010 = –300 ps
011 = –450 ps
100 = +150 ps
101 = +300 ps
110 = +450 ps
111 = +600 ps
Bit 6
0
CPU_Skew1
Bit 5
0
CPU_Skew0
Bit 4
0
Fixed 3V66_SEL
3V66 and PCI output frequency select mode
0 = Set according to Frequency Selection Table
1 = Set according to Fractional Aligner settings
Bit 3
0
PCI_Skew1
PCI skew control
00 = Normal
01 = –500 ps
10 = Reserved
11 = +500 ps
Bit 2
0
PCI_Skew0
Bit 1
0
3V66_Skew1
3V66 skew control
00 = Normal
01 = –150 ps
10 = +150 ps
11 = +300 ps
Bit 0
0
3V66_Skew0
Byte 11
Bit
@Pup
Name
Pin Description
Bit 7
0
Reserved
Bit 6
0
Reserved
Bit 5
0
Reserved
Bit 4
0
Reserved
Bit 3
0
Reserved
Bit 2
0
Reserved
Bit 1
0
Reserved
Bit 0
0
Reserved
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