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參數(shù)資料
| 型號： | CY28378OXCT |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 2/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK CK408/TITAN 845 48SSOP |
| 標準包裝： | 1,000 |
| 類型： | 時鐘/頻率發(fā)生器 |
| PLL： | 是 |
| 主要目的： | Intel CPU 服務(wù)器 |
| 輸入： | 晶體 |
| 輸出： | HCSL，LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:21 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 203MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-BSSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-SSOP |
| 包裝： | 帶卷 (TR) |
CY28378
...................... Document #: 38-07519 Rev. ** Page 10 of 21
Watchdog Self Recovery Sequence
This feature is designed to allow the system designer to
change frequency while the system is running and reboot the
operation of the system in case of a hang up due to the
frequency change.
When the system sends an SMBus command requesting a
frequency change through the Dial-a-Frequency Control
Registers, it must have previously sent a command to the
Watchdog Timer to select which time out stamp the Watchdog
must perform, otherwise the System Self Recovery feature will
not be applicable. Consequently, this device will change
frequency and then the Watchdog timer starts timing.
Meanwhile, the system BIOS is running its operation with the
new frequency. If this device receives a new SMBus command
to clear the bits originally programmed in the Watchdog Timer
bits (reprogram to 0000) before the Watchdog times out, then
this device will keep operating in its normal condition with the
new selected frequency.
The Watchdog timer will also be triggered if you program the
software frequency select bits (FSEL) to a new frequency
selection. If the Watchdog times out before the new SMBus
reprograms the Watchdog Timer bits to (0000), then this
device will send a low system reset pulse, on SRESET# and
changes WD Time-out bit to “1.”
Byte 12
Bit
@Pup
Name
Pin Description
Bit 7
0
Reserved
Bit 6
0
Reserved
Bit 5
0
Reserved
Bit 4
0
Reserved
Bit 3
0
Reserved
Bit 2
0
Reserved
Bit 1
0
Reserved
Bit 0
0
Reserved
Byte 13
Bit
@Pup
Name
Pin Description
Bit 7
0
Reserved
If Prog_Freq_EN is set, the values programmed in CPU_FSEL_N[6:0] and
CPU_FSEL_M[5:0] will be used to determine the CPU output frequency.
The setting of FS_Override bit determines the frequency ratio for CPU and
other output clocks. When it is cleared, the same frequency ratio stated in
the Latched FS[4:0] register will be used. When it is set, the frequency
ratio stated in the SEL[4:0] register will be used.
Bit 6
0
CPU_FSEL_N6
Bit 5
0
CPU_FSEL_N5
Bit 4
0
CPU_FSEL_N4
Bit 3
0
CPU_FSEL_N3
Bit 2
0
CPU_FSEL_N2
Bit 1
0
CPU_FSEL_N1
Bit 0
0
CPU_FSEL_N0
Byte 14
Bit
@Pup
Name
Pin Description
Bit 7
0
Pro_Freq_EN
Programmable output frequencies enabled
0 = disabled
1 = enabled
Bit 6
0
Reserved
Bit 5
0
CPU_FSEL_M5
If Prog_Freq_EN is set, the values programmed in CPU_FSEL_N[6:0] and
CPU_FSEL_M[5:0] will be used to determine the CPU output frequency.
The setting of FS_Override bit determines the frequency ratio for CPU and
other output clocks. When it is cleared, the same frequency ratio stated in
the Latched FS[4:0] register will be used. When it is set, the frequency
ratio stated in the SEL[4:0] register will be used.
Bit 4
0
CPU_FSEL_M4
Bit 3
0
CPU_FSEL_M3
Bit 2
0
CPU_FSEL_M2
Bit 1
0
CPU_FSEL_M1
Bit 0
0
CPU_FSEL_M0
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