參數(shù)資料
型號: CY28349BOC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: FTG for Intel Pentium 4 CPU and Chipsets
中文描述: 200.4 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝: SSOP-48
文件頁數(shù): 11/22頁
文件大?。?/td> 174K
代理商: CY28349BOC
CY28349B
Document #: 38-07454 Rev. *A
Page 11 of 22
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ROCV_FREQ_M6
ROCV_FREQ_M5
ROCV_FREQ_M4
ROCV_FREQ_M3
ROCV_FREQ_M2
ROCV_FREQ_M1
ROCV_FREQ_M0
If ROCV_FREQ_SEL is set, the values programmed in
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] will be
used to determine the recovery CPU output
frequency.when a Watchdog Timer time-out occurs.
The setting of FS_Override bit determines the frequency
ratio for CPU and other output clocks. When FS_Override
bit is cleared, the same frequency ratio stated in the
Latched FS[4:0] register will be used. When it is set, the
frequency ratio stated in the SEL[4:0] register will be used.
0
0
0
0
0
0
0
Data Byte 13
Bit
Pin#
Name
Pin Description
Power On
Default
0
0
0
0
0
0
0
0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CPU_FSEL_N7
CPU_FSEL_N6
CPU_FSEL_N5
CPU_FSEL_N4
CPU_FSEL_N3
CPU_FSEL_N2
CPU_FSEL_N1
CPU_FSEL_N0
If Prog_Freq_EN is set, the values programmed in
CPU_FSEL_N[7:0] and CPU_FSEL_M[6:0] will be used
to determine the CPU output frequency. The new
frequency will start to load whenever CPU_FSELM[6:0] is
updated.
The setting of FS_Override bit determines the frequency
ratio for CPU and other output clocks. When it is cleared,
the same frequency ratio stated in the Latched FS[4:0]
register will be used. When it is set, the frequency ratio
stated in the SEL[4:0] register will be used.
Data Byte 14
Bit
Pin#
Name
Pin Description
Power On
Default
0
Bit 7
Pro_Freq_EN
Programmable output frequencies enabled
0 = Disabled
1 = Enabled
If Prog_Freq_EN is set, the values programmed in
CPU_FSEL_N[7:0] and CPU_FSEL_M[6:0] will be used
to determine the CPU output frequency. The new
frequency will start to load whenever CPU_FSELM[6:0] is
updated.
The setting of FS_Override bit determines the frequency
ratio for CPU and other output clocks. When it is cleared,
the same frequency ratio stated in the Latched FS[4:0]
register will be used. When it is set, the frequency ratio
stated in the SEL[4:0] register will be used.
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CPU_FSEL_M6
CPU_FSEL_M5
CPU_FSEL_M4
CPU_FSEL_M3
CPU_FSEL_M2
CPU_FSEL_M1
CPU_FSEL_M0
0
0
0
0
0
0
0
Data Byte 15
Bit
Pin#
Name
Pin Description
Power On
Default
0
0
0
0
0
0
1
1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Vendor Test Mode
Vendor Test Mode
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved. Write with
1
Reserved. Write with
1
Data Byte 12
Bit
Pin#
Name
Pin Description
Power On
Default
相關(guān)PDF資料
PDF描述
CY28349BOCT FTG for Intel Pentium 4 CPU and Chipsets
CY28378 FTG for Pentium 4 and Intel 845 Series Chipset
CY28378OC FTG for Pentium 4 and Intel 845 Series Chipset
CY28378OCT FTG for Pentium 4 and Intel 845 Series Chipset
CY28400 100-MHz Differential Buffer for PCI Express and SATA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY28349BOCT 制造商:Rochester Electronics LLC 功能描述:FTG FOR INTEL 830M AND 845 CHIPSETS (CK-408) - Bulk
CY28349BOXC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FTG for Intel㈢ Pentium㈢ 4 CPU and Chipsets
CY28349BOXCT 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FTG for Intel㈢ Pentium㈢ 4 CPU and Chipsets
CY28349OC 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY28349OCT 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:FTG for Intel㈢ Pentium㈢ 4 CPU and Chipsets