參數資料
型號： CY28346OCT
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： XO, clock
英文描述： CONN BNC PLUG CRIMP RG-59,62
中文描述： 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝： SSOP-56
文件頁數： 15/20頁
文件大?。?/td> 179K
代理商： CY28346OCT
CY28346
Document #: 38-07331 Rev. *B
Page 15 of 20
T
CCJ
CPU Cycle to Cycle
Jitter
CPUT and CPUC Rise
and Fall Times
Rise/Fall Matching
150
150
150
150
ps
15, 16,
19
15, 17,
20
17, 18,
19
17, 19
17, 19
15, 19
T
R
/T
F
175
700
175
700
175
700
175
700
ps
20%
20%
20%
20%
DeltaT
R
DeltaT
F
V
CROSS
Rise Time Variation
Fall Time Variation
Crossing Point Voltage
at 0.7V Swing
125
125
430
125
125
430
125
125
430
125
125
430
ps
ps
mV
280
280
280
280
CPU at 1.0V Timing
T
DC
CPUT and CPUC Duty
Cycle
CPUT and CPUC
Period
Any CPU to Any CPU
Clock Skew
CPU Cycle to Cycle
Jitter
CPUT and CPUC Rise
and Fall Times
Absolute Single- ended
Rise/Fall Waveform
Symmetry
Cross Point at 1.0V
swing
45
55
45
55
45
55
45
55
%
15, 16
T
PERIOD
14.85
15.3
9.85
10.2
7.35
7.65
4.85
5.1
nS
15, 16
T
SKEW
100
100
100
100
pS
12, 15,
16
12, 16
T
CCJ
150
150
150
150
pS
Differential
T
R
/T
F
SE
–
DeltaSlew
175
467
175
467
175
467
175
467
ps
15, 20
325
325
325
325
ps
21, 22
V
CROSS
510
760
510
760
510
760
510
760
mV
22
3V66
T
DC
T
PERIOD
3V66 Duty Cycle
3V66 Period
45
15.0
55
15.3
45
15.0
55
15.3
45
15.0
55
15.3
45
15.0
55
15.3
%
ns
12, 13
9, 12,
13
23
24
25
T
HIGH
T
LOW
T
R
/T
F
3V66 HIGH Time
3V66 LOW Time
3V66 Rise and Fall
Times
3V66 to 3V66 Clock
Skew
3V66 to 3V66 Clock
Skew
DRCG Cycle to Cycle
Jitter
4.95
4.55
0.5
4.95
4.55
0.5
4.95
4.55
0.5
4.95
4.55
0.5
ns
ns
ns
2.0
2.0
2.0
2.0
T
SKEW
Unbuffered
T
SKEW
Buffered
T
CCJ
500
500
500
500
ps
12, 13
250
250
250
250
ps
12, 13
250
250
250
250
ps
12, 13
Notes:
20. Measurement taken from differential waveform, from
–
0.35V to +0.35V.
21. Measurements taken from common mode waveforms, measure rise/fall time from 0.41 to 0.86V. Rise/fall time matching is defined as
“
the instantaneous
difference between maximum CLK rise (fall) and minimum CLK# fall (rise) time or minimum CLK rise (fall) and maximum CLK# fall (rise) time.
”
This parameter
is designed form waveform symmetry.
22. Measured in absolute voltage, i.e., single-ended measurement.
23. THIGH is measured at 2.4V for non-host outputs.
24. TLOW is measured at 0.4V for all outputs.
25. Probes are placed on the pins, and measurements are acquired between 0.4V and 2.4V for 3.3V signals (see test and measurement set-up section of this data
sheet).
AC Parameters
(V
DD
= V
DDA
= 3.3V ±5%, T
A
= 0
°
C to +70
°
C) (continued)
Parameter
Description
66 MHz
Min.
100 MHz
Min.
133 MHz
Min.
200 MHz
Min.
Unit
Notes
Max.
Max.
Max.
Max.
相關PDF資料
PDF描述
CY28346ZC Clock Synthesizer with Differential CPU Outputs
CY28346ZCT Clock Synthesizer with Differential CPU Outputs
CY28347 HDC-HA-48-SVL1/29 RoHS Compliant: Yes
CY28347ZC Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems
CY28347ZCT Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems
相關代理商/技術參數
參數描述
CY28346OXC 功能描述:時鐘合成器/抖動清除器 NB clk for Intel 830M & 845 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
CY28346OXCT 功能描述:時鐘合成器/抖動清除器 NB clk for Intel 830M & 845 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
CY28346ZC 功能描述:時鐘合成器/抖動清除器 NB clk for Intel 830M & 845 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
CY28346ZC-2 制造商:Rochester Electronics LLC 功能描述:FTG FOR INTEL 830M AND 845 CHIPSETS (CK-408) - Bulk
CY28346ZC-2T 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential CPU Outputs
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