參數(shù)資料
型號(hào): CY28346OCT
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: CONN BNC PLUG CRIMP RG-59,62
中文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: SSOP-56
文件頁(yè)數(shù): 10/20頁(yè)
文件大?。?/td> 179K
代理商: CY28346OCT
CY28346
Document #: 38-07331 Rev. *B
Page 10 of 20
PCI_STP# Assertion
The PCI_STP# signal is an active LOW input used for
synchronous stopping and starting the PCI outputs while the
rest of the clock generator continues to function. The set-up
time for capturing PCI_STP# going LOW is 10 ns (t
setup
) (see
Figure 14
.) The PCI_F (0:2) clocks will not be affected by this
pin if their control bits in the SMBus register are set to allow
them to be free running.
Table 7. Cypress Clock Power Management Truth Table
B0b6
B1b6
PD#
CPU_STP#
Stoppable
CPUT
Running
Iref x6
Iref x2
Iref x2
Running
Hi-Z
Hi-Z
Hi-Z
Running
Iref x6
Hi-Z
Hi-Z
Running
Hi-Z
Hi-Z
Hi-Z
Stoppable
CPUC
Running
Iref x6
LOW
LOW
Running
Hi-Z
Hi-Z
Hi-Z
Running
Iref x6
Hi-Z
Hi-Z
Running
Hi-Z
Hi-Z
Hi-Z
Non-Stop CPUT
Non-Stop CPUC
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Running
Running
Iref x2
Iref x2
Running
Running
Hi-Z
Hi-Z
Running
Running
Hi-Z
Hi-Z
Running
Running
Hi-Z
Hi-Z
Running
Running
LOW
LOW
Running
Running
Hi-Z
Hi-Z
Running
Running
Hi-Z
Hi-Z
Running
Running
Hi-Z
Hi-Z
CPU_STP#
CPUT
CPUC
CPUT
CPUC
Figure 10. CPU_STP# Deassertion Waveform
相關(guān)PDF資料
PDF描述
CY28346ZC Clock Synthesizer with Differential CPU Outputs
CY28346ZCT Clock Synthesizer with Differential CPU Outputs
CY28347 HDC-HA-48-SVL1/29 RoHS Compliant: Yes
CY28347ZC Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems
CY28347ZCT Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems
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