- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379002 > CY2313ANZSC-1 (CYPRESS SEMICONDUCTOR CORP) 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs PDF資料下載
參數(shù)資料
| 型號(hào)： | CY2313ANZSC-1 |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| 中文描述： | 2313 SERIES, LOW SKEW CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.300 INCH, MO-119, SOIC-28 |
| 文件頁(yè)數(shù)： | 2/8頁(yè) |
| 文件大?。?/td> | 90K |
| 代理商： | CY2313ANZSC-1 |
CY2313ANZ
Document #: 38-07144 Rev. *A
Page 2 of 8
Serial Configuration Map
The Serial bits will be read by the clock driver in the following
order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
.
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
Reserved and unused bits should be programmed to
“
0
”
Serial interface address for the CY2313ANZ is:
Pin Summary
Name
V
DD
V
SS
V
DDIIC
V
SSIIC
BUF_IN
SDATA
SCLK
SDRAM [0-12]
Pins
1, 5, 20, 24, 28
4, 8, 17, 21, 25
13
16
9
14
15
2, 3, 6, 7, 10, 11, 12, 18, 19, 22, 23,
26, 27
Description
3.3V Digital voltage supply
Ground
Serial interface voltage supply
Ground for serial interface
Input clock
Serial data input, internal pull-up to V
DD
Serial clock input, internal pull-up to V
DD
SDRAM clock outputs
A6
1
A5
1
A4
0
A3
1
A2
0
A1
0
A0
1
R/W
----
Byte 0:SDRAM Active/Inactive Register
(1 = Enable, 0 = Disable), Default = Enabled
Bit
Bit 7 11
Bit 6 10
Bit 5 --
Bit 4 --
Bit 3 7
Bit 2 6
Bit 1 3
Bit 0 2
Pin #
Description
SDRAM5 (Active/Inactive)
SDRAM4 (Active/Inactive)
Reserved, drive to 0
Reserved, drive to 0
SDRAM3 (Active/Inactive)
SDRAM2 (Active/Inactive)
SDRAM1 (Active/Inactive)
SDRAM0 (Active/Inactive)
Byte 1: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
27
26
23
22
--
--
19
18
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SDRAM11 (Active/Inactive)
SDRAM10 (Active/Inactive)
SDRAM9 (Active/Inactive)
SDRAM8 (Active/Inactive)
Reserved, drive to 0
Reserved, drive to 0
SDRAM7 (Active/Inactive)
SDRAM6 (Active/Inactive)
Byte 2: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
--
12
--
--
--
--
--
--
Reserved, drive to 0
SDRAM12 (Active/Inactive)
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
Reserved, drive to 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY2412 | MPEG Clock Generator with VCXO |
| CY2412SC-1 | MPEG Clock Generator with VCXO |
| CY2412SC-1T | MPEG Clock Generator with VCXO |
| CY2412SC-3 | MPEG Clock Generator with VCXO |
| CY2412SC-3T | MPEG Clock Generator with VCXO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2313ANZSC-1T | 制造商:Cypress Semiconductor 功能描述:Clock Fanout Buffer 13-OUT 28-Pin SOIC T/R |
| CY2313ANZSXC-1 | 功能描述:時(shí)鐘緩沖器 3.3V Non Zero Delay SDRAM Buffer RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| CY2313ANZSXC-1T | 功能描述:時(shí)鐘緩沖器 3.3V Non Zero Delay SDRAM Buffer RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| CY2314ANZ | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:14 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| CY2314ANZ_08 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:14 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。