參數(shù)資料
型號(hào): CY2285
廠商: Cypress Semiconductor Corp.
英文描述: 100-MHz PentiumII Clock Synthesizer/Driver with Spread Spectrum for Mobile PCs(應(yīng)用于移動(dòng)PC機(jī)并帶有寬頻譜的100MHz奔騰II時(shí)鐘合成器/驅(qū)動(dòng)器)
中文描述: 100兆赫PentiumII時(shí)鐘合成器/驅(qū)動(dòng)器,帶有擴(kuò)頻移動(dòng)PC(應(yīng)用于移動(dòng)電腦機(jī)并帶有寬頻譜的100MHz的奔騰二時(shí)鐘合成器/驅(qū)動(dòng)器)
文件頁(yè)數(shù): 6/9頁(yè)
文件大?。?/td> 120K
代理商: CY2285
CY2285
6
Switching Characteristics
[8]
Over the Operating Range
Parameter
Output
Description
Test Conditions
Min.
Typ.
Max.
Unit
t
1
t
2
All
Output Duty Cycle
[9]
t
1
= t
1A
÷
t
1B
Between 0.4V and 2.0V
45
50
55
%
CPUCLK
CPU Clock Rising and
Falling Edge Rate
1.0
4.0
V/ns
t
2
PCICLK
PCI Clock Rising and
Falling Edge Rate
Between 0.4V and 2.4V
1.0
4.0
V/ns
t
2
REF
REF Clock Rising and
Falling Edge Rate
Between 0.4V and 2.4V
0.5
2.0
V/ns
t
3
t
4
t
5
t
6
CPUCLK
CPU Clock Rise Time
Between 0.4V and 2.0V
0.4
1.6
ns
CPUCLK
CPU Clock Fall Time
Between 2.0V and 0.4V
0.4
1.6
ns
CPUCLK
CPU-CPU Clock Skew
Measured at 1.25V
100
175
ps
CPUCLK,
PCICLK
CPU-PCI Clock Skew
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
1.5
4.0
ns
t
7
PCICLK,
PCICLK
PCI-PCI Clock Skew
Measured at 1.5V
250
ps
t
7
EPCICLK,
PCICLK
EPCI-PCI Clock Skew
[7]
Measured at 1.5V
1.0
4.0
ns
t
10
t
11
t
12
CPUCLK
Cycle-Cycle Clock Jitter
Measured at 1.25V
700
ps
PCICLK
Cycle-Cycle Clock Jitter
Measured at 1.5V
500
ps
CPUCLK,
PCICLK
Power-up Time
CPU and PCI clock stabilization from
power-up
3
ms
t
13
CPUCLK,
PCICLK
/4 Frequency Slew
Time
[7]
Time for CPU, EPCI, and PCI clock
frequency to change from f to f/4 after
select input change
10
25
cycles
Notes:
8.
9.
All parameters specified with loaded outputs.
Duty cycle is measured at 1.5V when V
DD
= 3.3V. When V
DD
= 2.5V, duty cycle is measured at 1.25V..
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