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參數(shù)資料
| 型號(hào)： | CY2277APVI-12 |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | Circular Connector; No. of Contacts:56; Series:MS27656; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No |
| 中文描述： | 66.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 3/19頁 |
| 文件大小： | 206K |
| 代理商： | CY2277APVI-12 |
CY2277A
Document #: 38-07332 Rev. *A
Page 3 of 19
CPU and PCI Clock Driver Strengths
Matched impedances on both rising and falling edges on
the output drivers
Output impedance: 25
(typical) measured at 1.5V
Notes:
3.
4.
On power-up, the default frequency on these outputs is 48 MHz.
Meets Intel USB clock requirements.
Function Table (-1, -1M, -7M, -12, -12M, -12I)
SEL
XTALIN
14.318 MHz
14.318 MHz
CPUCLK[0:3]
SDRAM[0:7]
60.0 MHz
66.67 MHz
PCICLK[0:5]
PCICLK_F
30.0 MHz
33.33 MHz
REF[0:1]
IOAPIC
14.318 MHz
14.318 MHz
USBCLK / IOCLK
[3]
48.0 MHz / 24.0 MHz
48.0 MHz / 24.0 MHz
0
1
Function Table (-3)
SEL
XTALIN
14.318 MHz
14.318 MHz
CPUCLK[0:3]
SDRAM[0:7]
33.33 MHz
66.67 MHz
PCICLK[0:5]
PCICLK_F
16.67 MHz
33.33 MHz
REF[0:1]
IOAPIC
14.318 MHz
14.318 MHz
USBCLK / IOCLK
[3]
48.0 MHz / 24.0 MHz
48.0 MHz / 24.0 MHz
0
1
Actual Clock Frequency Values (-1, -1M, -3, -7M,
-12, -12M, -12I)
Clock Output
CPUCLK,
SDRAM
CPUCLK,
SDRAM
USBCLK
[4]
IOCLK
Target
Frequency
(MHz)
66.67
Actual
Frequency
(MHz)
66.654
PPM
–
195
60.0
60.0
0
48.0
24.0
48.008
24.004
167
167
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2277APVI-12T | 制造商:Cypress Semiconductor 功能描述: |
| CY2277PAC1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| CY2277PVC-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| CY2278A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| CY2278APAC-1L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
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