參數(shù)資料
型號: CY2277APVC-12
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: LJT 37C 37#16 PIN RECP
中文描述: 66.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝: SSOP-48
文件頁數(shù): 16/19頁
文件大?。?/td> 206K
代理商: CY2277APVC-12
CY2277A
Document #: 38-07332 Rev. *A
Page 16 of 19
Application Information
Clock traces must be terminated with either series or parallel termination, as is normally done.
Application Circuit
Summary
A parallel-resonant crystal should be used as the reference to the clock generator. The operating frequency and C
of
this crystal should be as specified in the data sheet. Optional trimming capacitors may be needed if a crystal with a different
C
LOAD
is used. Footprints can be laid out for flexibility.
Surface mount, low-ESR, ceramic capacitors should be used for filtering. Typically, these capacitors have a value of 0.1
μ
F.
In some cases, smaller value capacitors may be required.
The value of the series terminating resistor satisfies the following equation, where R
is the loaded characteristic impedance
of the trace, R
out
is the output impedance of the clock generator (specified in the data sheet), and R
series
is the series terminating
resistor.
R
series
> R
trace
R
out
Footprints must be laid out for optional EMI-reducing capacitors, which should be placed as close to the terminating resistor
as is physically possible. Typical values of these capacitors range from 4.7 pF to 22 pF.
A Ferrite Bead
may
be used to isolate the Board V
from the clock generator V
island. Ensure that the Ferrite Bead offers
greater than 50
impedance at the clock frequency, under loaded DC conditions. Please refer to the application note
Layout
and Termination Techniques for Cypress Clock Generators
for more details.
If a Ferrite Bead is used, a 10
μ
F
22
μ
F tantalum bypass capacitor should be placed close to the Ferrite Bead. This capacitor
prevents power supply droop during current surges.
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