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參數(shù)資料
| 型號： | CY2071ASXL-XXX |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | Single-PLL General-Purpose EPROM Programmable Clock Generator |
| 中文描述： | 100 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, LEAD FREE, MS-012, SOIC-8 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 223K |
| 代理商： | CY2071ASXL-XXX |
CY2071A
Document #: 38-07139 Rev. *D
Page 5 of 9
Switching Characteristics, Commercial 3.3V
[11]
Parameter
t
1
Name
Description
Min.
10
Typ.
Max.
2000
[500 kHz]
2000
[500 kHz]
1
Unit
ns
Output Period
Clock output range 3.3V operation
15-pF load
CY2071AS
[100 MHz]
12.50
[80 MHz]
CY2071AF
ns
t
1A
Clock Jitter
Peak-to-peak period jitter (t
1
max. – t
1
min.), % of
clock period, f
OUT
≤
16 MHz
Peak-to-peak period jitter
(16 MHz
≤
f
OUT
≤
50 MHz)
Peak-to-peak period jitter (f
OUT
> 50 MHz)
Duty cycle
[13, 14]
for outputs, (t
2
÷
t
1
)
f
OUT
≤
60 MHz
Duty cycle
[14]
for outputs, (t
2
÷
t
1
),
f
OUT
> 60 MHz
Output clock rise time
Output clock fall time
Skew delay between any two outputs with
identical frequencies (generated by the PLL)
0.8
%
t
1B
Clock Jitter
350
500
ps
t
1C
Clock Jitter
[12]
Output Duty Cycle
250
50%
350
55%
ps
45%
Output Duty
Cycle
[12]
Rise Time
[12]
Fall Time
[12]
Skew
40%
50%
60%
t
3
t
4
t
5
1.5
1.5
2.5
2.5
0.5
ns
ns
ns
Switching Characteristics, Industrial 5.0V
[11]
Parameter
t
1
Name
Description
Min.
10
Typ.
Max.
2000
[500 kHz]
2000
[500 kHz]
1
Unit
ns
Output Period
Clock output range 5.0V operation
25-pF load
CY2071AI
[100 MHz]
11.1
[90 MHz]
CY2071AFI
ns
t
1A
Clock Jitter
Peak-to-peak period jitter (t
1
max. –
t
1
min.),
% of clock period, f
OUT
≤
16 MHz
Peak-to-peak period jitter
(16 MHz
≤
f
OUT
≤
50 MHz)
Peak-to-peak period jitter
(f
OUT
> 50 MHz)
Duty cycle
[13, 14]
for outputs, (t
2
÷
t
1
)
f
OUT
≤
60 MHz
Duty cycle
[14]
for outputs, (t
2
÷
t
1
),
f
OUT
>
60 MHz
Output clock rise time
Output clock fall time
Skew delay between any two
outputs with identical frequencies
(generated by the PLL)
0.8
%
t
1B
Clock Jitter
350
500
ps
t
1C
Clock Jitter
[12]
250
350
ps
Output Duty Cycle
45%
50%
55%
Output Duty
Cycle
[12]
Rise time
[12]
Fall time
[12]
Skew
40%
50%
60%
t
3
t
4
t
5
1.5
1.5
2.5
2.5
0.5
ns
ns
ns
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