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| 型號(hào)： | CY2040WAF |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時(shí)鐘和緩沖器 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 94K |
| 代理商： | CY2040WAF |
CY2040WAF
PRELIMINARY
Document #: 38-07234 Rev. *A
Page 5 of 10
DC Characteristics
(Vbatt = 2.5V to 3.6V, Vdd = 2.7V to 5.5V, T
J
=
–
10
°
C to 100
°
C unless otherwise noted)
Parameter
Description
V
IL
Input low voltage
OE Pins
Vdd
= 2.7V to 3.6V
Condition
Min.
Typ.
Max.
0.8
0.2
Vdd
Unit
V
Vdd
= 4.5V to 5.5V
V
IH
Input high voltage
OE pins
Input low current
OE Pins
Input high current
OE Pins
Vdd
= 2.7V to 5.5V
2.0
V
I
IL
V
IN
= 0V
<1
10
μ
A
I
IH
V
IN
=
Vdd
<1
5
μ
A
Out1 (Vbatt 2.5V
–
3.6V)
V
OL
Output low voltage
(out1)
Output high voltage
CMOS level
Vbatt
= 2.5V to 3.6V,
I
OL
= 8 mA
0.4
V
V
OHC
(CMOS)
Out2, Out3 (Vdd 2.7V
–
5.5V)
V
OL
Output low voltage
Vbatt
= 2.5V to 3.6V,
I
OH
= - 8 mA
Vbatt
–
0.4
Vdd
= 4.5V to 5.5V,
I
OL
= 16 mA
Vdd
= 2.7V to 3.6V,
I
OL
= 8 mA
Vdd
= 4.5V to 5.5V,
I
OH
=
–
16 mA
Vdd
= 2.7V to 3.6V,
I
OH
=
–
8 mA
Vdd
= 4.5V to 5.5V,
I
OH
=
–
16 mA
0.4
0.4
V
V
OHC
(CMOS)
Output high voltage
CMOS level
Vdd
–
0.4
Vdd
–
0.4
2.4
V
V
OHT
(TTL)
I
OZ
Output high voltage,
TTL levels
Output leakage cur-
rent (Out2, Out3)
Supply current on Vdd
(No load)
V
Vdd
= 2.7 to 5.5V,
with output disabled
1
50
μ
A
I
OP_Vdd
Vdd
= 4.5 to 5.5V,
fout3 = 66 MHz,
fout2 = 32.768 kHz
Vdd
= 2.7 to 3.6V,
fout3 = 66 MHz,
fout2 = 32.768 kHz
Vbatt
= 3.3V, T = 25C, Vdd = 0V
Vbatt
= 3.6V, T =
–
10 to 100 C, Vdd = 0 V
OE1, OE2; Vdd
= 4.5V to 5.5V, measured
V
IN
= 0.7
Vdd
OE1, OE2; Vdd
= 4.5V to 5.5V, measured
V
IN
= 0.0
V
T0
–
T6
45
mA
25
I
OP_Vbatt
Supply current on
Vbatt (15-pF load)
5
μ
A
10
200
R
UPH
Pull-up Resistor
15
100
k
R
UPL
R
PON
Pull-up Resistor
Parallel equivalent
static on resistance
1.1
10
3.0
8.0
M
k
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