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| 型號(hào)： | CY14B104L-ZSP25XIT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 4-Mbit (512K x 8/256K x 16) nvSRAM |
| 中文描述： | 512K X 8 NON-VOLATILE SRAM, 25 ns, PDSO54 |
| 封裝： | ROHS COMPLIANT, TSOP2-54 |
| 文件頁(yè)數(shù)： | 11/21頁(yè) |
| 文件大小： | 371K |
| 代理商： | CY14B104L-ZSP25XIT |
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CY14B104L/CY14B104N
PRELIMINARY
Document #: 001-07102 Rev. *E
Page 11 of 21
AutoStore/Power Up RECALL
Parameters
Description
CY14B104L/CY14B104N
Min
Unit
Max
20
15
2.65
t
HRECALL [12]
t
STORE [13]
V
SWITCH
t
VCCRISE
Power Up RECALL Duration
STORE Cycle Duration
Low Voltage Trigger Level
VCC Rise Time
ms
ms
V
μ
s
150
Software Controlled STORE/RECALL Cycle
[14,15]
Parameters
Description
15ns
25ns
45ns
Unit
Min
15
0
12
1
Max
Min
25
0
20
1
Max
Min.
45
0
30
1
Max.
t
RC
t
AS
t
CW
t
GHAX
t
RECALL
t
SS [16,17]
STORE/RECALL Initiation Cycle Time
Address Setup Time
Clock Pulse Width
Address Hold Time
RECALL Duration
Soft Sequence Processing Time
ns
ns
ns
ns
μ
s
μ
s
100
70
100
70
100
70
Notes
12.t
starts from the time V
rises above V
13.If an SRAM Write has not taken place since the last nonvolatile cycle, no STORE will take place.
14.The software sequence is clocked with CE controlled or OE controlled reads.
15.The six consecutive addresses must be read in the order listed in the mode selection table. WE must be HIGH during all six consecutive cycles.
16.This is the amount of time it takes to take action on a soft sequence command. V
power must remain HIGH to effectively register command.
17.Commands such as STORE and RECALL lock out IO until operation is complete which further increases this time. See specific command.
18.Read and write cycles in progress before HSB are supplied this amount of time to complete.
Hardware STORE Cycle
Parameters
Description
CY14B104L/CY14B104N
Min
1
15
Unit
Max
70
t
DELAY [18]
t
HLHX
Time allowed to complete SRAM Cycle
Hardware STORE Pulse Width
μ
s
ns
Switching Waveforms
Figure 2. SRAM Read Cycle #1: Address Controlled
[8,9,19]
t
RC
t
AA
t
OHA
ADDRESS
DQ (DATA OUT)
DATA VALID
[+] Feedback
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY14B104L-ZSP45XCT | 4-Mbit (512K x 8/256K x 16) nvSRAM |
| CY14B104L-ZSP45XI | 4-Mbit (512K x 8/256K x 16) nvSRAM |
| CY14B104L-ZSP45XIT | 4-Mbit (512K x 8/256K x 16) nvSRAM |
| CY14B104N | 4-Mbit (512K x 8/256K x 16) nvSRAM |
| CY14B104N-BA15XCT | 4-Mbit (512K x 8/256K x 16) nvSRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY14B104L-ZSP45XCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512K x 8/256K x 16) nvSRAM |
| CY14B104L-ZSP45XI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4 Mbit (512K x 8/256K x 16) nvSRAM |
| CY14B104L-ZSP45XIT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512K x 8/256K x 16) nvSRAM |
| CY14B104M | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4 Mbit (512K x 8/256K x 16) nvSRAM with Real Time Clock |
| CY14B104MA | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4 Mbit (512K x 8/256K x 16) nvSRAM with Real-Time-Clock |
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