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參數(shù)資料
| 型號： | CXL5509M |
| 廠商： | Sony Corporation |
| 英文描述： | CMOS-CCD 1H/2H Delay Line for NTSC |
| 中文描述： | CMOS與CCD 1H/2H延遲線對NTSC |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 156K |
| 代理商： | CXL5509M |
CMOS-CCD 1H/2H Delay Line for NTSC
Description
The CXL5509M/P is a CMOS-CCD delay line
developed for video signal processing. Usage in
conjunction with an external low-pass filter provide 1H
and 2H delay signals simultaneously (For NTSC
signals).
Features
Single power supply (5V)
Low power consumption 130mW (Typ.)
Built-in peripheral circuits
Built-in quadruple PLL circuit
For NTSC signals
1 input and 2 outputs
(Outputs for both 1H and 2H delays)
Functions
906-bit (1H) and 1816-bit (2H) CCD register
Clock driver
Auto-bias circuit
Sync tip clamp circuit
Sample-and-hold circuit
Quadruple PLL circuit
Structure
CMOS-CCD
Absolute Maximum Ratings
(Ta = 25°C)
Supply voltage
Operating temperature Topr
Storage temperature
Allowable power dissipation
V
DD
6
V
–10 to +60
–55 to +150
°C
°C
Tstg
P
D
CXL5509M
CXL5509P
400
800
mW
mW
Recommended Operating Condition
(Ta = 25°C)
Supply voltage
V
DD
5 ± 5%
V
Recommended Clock Conditions
(Ta = 25°C)
Input clock amplitude
V
CLK
0.3 to 1.0
(0.5Vp-p typ.)
3.579545
Vp-p
Clock frequency
Input clock waveform
f
CLK
sine wave
MHz
Input Signal Amplitude
V
SIG
571mVp-p (Max.) (at internal clamp condition)
– 1 –
E91401B7X-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXL5509M/P
Blook Diagram and Pin Configuration
(Top View)
Output circuit
(S/H 1bit)
C
1
I
2
3
4
5
7
Auto-bias circuit
Timing circuit
CCD
(1816bit)
Driver
Bias circuit
Clamp circuit
6
V
V
D
A
O
V
V
9
10
11
12
13
14
V
S
V
S
V
S
(
V
S
V
S
P
PLL
15
16
Output circuit
(S/H 1bit)
8
V
D
906bit
1816bit
O
CXL5509M
16 pin SOP (Plastic)
CXL5509P
16 pin DIP (Plastic)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXL5509P | CMOS-CCD 1H/2H Delay Line for NTSC |
| CXL5512M | CMOS-CCD 1H Delay Line for NTSC |
| CXL5512P | CMOS-CCD 1H Delay Line for NTSC |
| CXL5513M | CMOS-CCD 1H Delay Line for NTSC |
| CXL5513P | CMOS-CCD 1H Delay Line for NTSC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXL5509M/P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-CCD 1H/2H Delay Line for NTSC |
| CXL5509P | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CMOS-CCD 1H/2H Delay Line for NTSC |
| CXL5512M | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CMOS-CCD 1H Delay Line for NTSC |
| CXL5512M/P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-CCD 1H Delay Line for NTSC |
| CXL5512P | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CMOS-CCD 1H Delay Line for NTSC |
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