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參數(shù)資料
| 型號： | CXK5V8512TM- |
| 廠商： | Sony Corporation |
| 英文描述： | 65536-word X 8-bit High Speed CMOS Static RAM |
| 中文描述： | 65536字× 8位高速CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 8/10頁 |
| 文件大小： | 154K |
| 代理商： | CXK5V8512TM- |
– 8 –
CXK5V8512TM
Write cycle (3) :
CE2 control
Address
OE
t
WC
t
AW
Data valid
t
CW
t
WR1
t
WP
t
DW
t
DH
High impedance
CE1
WE
Data out
Data in
t
AS
t
CW
(
3)
CE2
1
2
3
t
WR1
is tested from either the rising edge of CE1 or the falling edge of CE2, whichever comes earlier, until
the end of the write cycle.
Write is executed when both CE1 and WE are at low and CE2 is at high simultaneously.
Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition.
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