參數(shù)資料
型號(hào)： CXD3412GA
廠商： Sony Corporation
英文描述： Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
中文描述： 時(shí)序發(fā)生器和幀讀出CCD圖像傳感器信號(hào)處理器
文件頁(yè)數(shù)： 35/46頁(yè)
文件大小： 383K
代理商： CXD3412GA
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C
Chart-8
Horizontal Direction Timing Chart
(Frame shift, High-speed sweep: E)
MODE
AF1 mode, AF2 mode
Applicable CCD image sensor
ICX412
The HD of this chart indicates the actual CXD3412GA load timing.
The numbers at the output pulse transition points indicate the count at the MCKO rise from the fall of HD.
The HD fall period should be between approximately 2.3 to 19.0μs (when the drive frequency is 22.5MHz).
This chart shows a period of 124ck (5.5μs). Internal SSG is at this timing.
SUB is output at the timing shown above when output is controlled by the serial interface data.
ID/EXP of this chart shows ID. PBLK, CLPOB, ID/EXP and WEN are output at the timing shown above at the position shown in Chart-3 and 4.
Frame shift of V1A/B, V2, V3A/B and V4 is performed up to 11H 2548ck (#68) in AF1 mode and 18H 308ck (#110) in AF2 mode.
In addition, high-speed sweep is performed up to 141H 2612ck (#75) in AF1 mode and 70H 2612ck (#116) in AF2 mode.
HD
MCKO
H1
H2
V1A/B
V2
V3A/B
V4
SUB
PBLK
CLPOB
CLPDM
(2624)
0
50
100
200
150
250
300
350
400
450
500
550
ID/EXP
WEN
508
536/540/544
52
4
120
52
52
52
42
16
124
132
180
260
308
388
436
516
148
228
276
356
404
484
532
100
116
196
244
324
372
452
500
68
84
164
242
292
340
420
468
548
#2
#1
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