參數(shù)資料
型號(hào): CXD3003
廠商: Sony Corporation
元件分類: 數(shù)字信號(hào)處理
英文描述: CD Digital Signal Processor with Built-in Digital Servo and DAC
中文描述: CD數(shù)字信號(hào)處理器,具有內(nèi)置數(shù)字伺服和DAC
文件頁數(shù): 7/137頁
文件大小: 1361K
代理商: CXD3003
– 7 –
CXD3003R
83
84
85
86
87
88
89
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
111
112
113
114
115
116
117
118
119
120
121
122
O
O
I
O
O
O
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I
O
O
O
O
I/O
I
O
O
O
1, Z, 0
1, 0
1, Z, 0
1, Z, 0
1, Z, 0
1, 0
1, 0
1, 0
1, 0
1, Z, 0
1, 0
1, Z, 0
1, Z, 0
1, 0
1, 0
1, 0
1, 0
Channel 2 DAC PWM output (forward phase).
Analog power supply.
Master clock power supply.
Master clock crystal oscillation circuit output.
Master clock crystal oscillation circuit input.
Master clock GND.
Analog GND.
Channel 1 DAC PWM output (forward phase).
Channel 1 DAC PWM output (reversed phase).
Analog power supply.
Digital power supply.
SENS output to CPU.
Used during 1-track jumps.
SENS serial data readout clock input.
Anti-shock pin.
Serial data input from CPU.
Latch input from CPU. Serial data is latched at the falling edge.
Serial data transfer clock input from CPU.
Digital GND.
Track count signal I/O.
Mirror signal I/O.
Defect signal I/O.
Focus OK signal I/O.
Test pin. Leave this open.
Spindle motor external pin input.
Spindle motor output filter switching output.
GRSCOR output when $8 command SCOR SEL = high.
Spindle motor on/off control output.
Spindle motor servo control output.
Spindle motor servo control output.
GFS is sampled at 460Hz; when GFS is high, this pin outputs a high signal.
If GFS is low eight consecutive samples, this pin outputs low. Input when
LKIN = high.
Disc innermost track detection signal input.
Digital GND.
Sled drive output.
Sled drive output.
Tracking drive output.
AO2F
AV
DD
4
AV
DD
5
XTLO
XTLI
AV
SS
5
AV
SS
3
AO1F
AO1R
AV
DD
3
AV
DD
4
SENS
DIRC
SCLK
ATSK
DATA
XLAT
CLOK
DV
SS
4
COUT
MIRR
DFCT
FOK
TESTA
PWMI
FSW
MON
MDP
MDS
LOCK
SSTP
DV
SS
5
SFDR
SRDR
TFDR
Pin
No.
Symbol
I/O
Description
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