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參數(shù)資料
| 型號： | CXD2724AQ-3 |
| 廠商： | Sony Corporation |
| 英文描述： | Single-Chip Dolby Pro Logic Surround Decoder(單片杜比環(huán)繞邏輯譯碼器) |
| 中文描述： | 單片杜比定向邏輯環(huán)繞聲解碼器（單片杜比環(huán)繞邏輯譯碼器） |
| 文件頁數(shù)： | 59/65頁 |
| 文件大?。?/td> | 490K |
| 代理商： | CXD2724AQ-3 |
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CXD2724AQ-3
(7) Delay Time Settings
[Relevant data] Coefficients: Ltp0 (81H), Ltp1 (82H), Ltp2 (83H), Ltp3 (84H), Ltp4 (85H), Rtp0 (86H),
Rtp1 (87H), Rtp2 (88H), Rtp3 (89H), Rtp4 (8aH), Stp0 (8bH), Stp1 (8cH),
Stp2 (8dH), Stp3 (8eH), tp_fb (8fH), ap0_in (90H), ap0_out (91H),
ap1_in (92H), ap1_out (93H)
Setup: SQA05, SQA04, SQC07, SQC06
First, select No decimation, 1/2 decimation or 1/3 decimation.
1/1 (No decimation): SQA11, 10 = "00", SQC07, 06 = "00"
1/2 decimation:
SQA11, 10 = "01", SQC07, 06 = "01"
1/3 decimation:
SQA11, 10 = "10", SQC07, 06 = "1
" (
= Don't care)
Next, set tp_fb (8fH) which determines the comb filter delay time, and ap0_in (90H), ap0_out (91H), ap1_in
(92H) and ap1_out (93H) which determine the all pass filter delay times.
The following conditions apply.
0
≤
tp_fb, tp_fb + 0020H
≤
ap0_in
≤
ap0_out, ap0_out + 0020H
≤
ap1_in
≤
ap1_out
≤
bfe0H
0
≤
Comb filter tap (Ltp0 to Stp3)
≤
tp_fb
Note)
The minimum unit for all the above coefficients is "0020H". Values larger than this are ignored.
(7)-1. Comb Filter
First, set the comb filter maximum delay time tp_fb (8fH). The coefficient value is calculated as follows.
(Dly)
Decimal
= (Delay [s])
×
fs [Hz]
×
32
(The delay value is multiplied by 1/2 and 1/3 during 1/2 and 1/3 decimation, respectively.)
Next set the delay times for the comb filter taps, and calculate the coefficient values in the same manner as for
tp_fb. (0
≤
Tap
≤
tp_fb)
Example)
For a maximum delay time of 36ms (1/2 decimation, fs = 44100Hz)
0.036
×
(1/2)
×
44100
×
32 = 25401.6
Rounding up to 25402 and converting to hexadecimal notation:
633aH
However, the address is specified in 0020H increments, so this becomes:
6340H
Therefore, set all (14) of the L, R and S channel taps to 6340H (36 ms) or less. For example, the L
channel settings could be:
Ltp0 = 1ba0H (10ms)
Ltp1 = 2960H (15ms)
Ltp2 = 3720H (20ms)
Ltp3 = 44e0H (25ms)
Ltp4 = 52c0H (30ms)
Set the R and S channels in the same manner.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| CXD2728Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Single-Chip Dolby Pro Logic Surround Decoder |
| CXD2917 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:DIGITAL AUDIO DATA MODULATION AND TRANSMISSION |
| CXD2917Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:DIGITAL AUDIO DATA MODULATION AND TRANSMISSION |
| CXD2930BR | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:GPS LSI with Built-in 32-bit RISC CPU |
| CXD2931GA-9 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RF/BASEBAND CIRCUIT|CMOS|LGA|144PIN|CERAMIC |
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