參數(shù)資料
型號(hào): CXD2587Q
廠商: Sony Corporation
元件分類: 數(shù)字信號(hào)處理
英文描述: CD Digital Signal Processor with Built-in Digital Servo and DAC
中文描述: CD數(shù)字信號(hào)處理器,具有內(nèi)置數(shù)字伺服和DAC
文件頁(yè)數(shù): 97/106頁(yè)
文件大?。?/td> 807K
代理商: CXD2587Q
– 97 –
CXD2587Q
§4-20. Filter Composition
The internal filter composition is shown below.
K
and M
indicate coefficient RAM and Data RAM address values respectively.
FCS Servo Gain Normal fs = 88.2kHz
K0D
K0C
K0E
K10
Z
–1
K0B
Z
–1
K09
K0A
K08
Z
–1
M04
M03
2
–7
2
–7
M05
M06
Z
–1
K11
K13
K0F
FCS
Hold Reg 1
FCS
AUTO Gain
FCS PWM
2
7
FCS SRCH
M07
2
–1
K06
AGFON
K06
DFCT
FCS
Hold Reg 2
FCS
In Reg
Sin ROM
FCS Servo Gain Down fs = 88.2kHz
Z
–1
Z
–1
Z
–1
M04
M03
2
–7
2
–7
M05
M06
Z
–1
2
7
M07
2
–1
DFCT
K29
K28
K2A
K2C
K27
K25
K26
K24
K2D
K13
K2B
FCS
Hold Reg 1
FCS
AUTO Gain
FCS PWM
FCS SRCH
K06
FCS
Hold Reg 2
FCS
In Reg
Note) Set the MSB bit of the K0B and K0D coefficients to 0.
Note) Set the MSB bit of the K27 and K29 coefficients to 0.
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