參數(shù)資料
型號(hào): CXD2585Q
廠商: Sony Corporation
元件分類: 數(shù)字信號(hào)處理
英文描述: CD Digital Signal Processor with Built-in Digital Servo
中文描述: CD數(shù)字信號(hào)處理器的內(nèi)置數(shù)碼舵機(jī)
文件頁數(shù): 12/127頁
文件大?。?/td> 962K
代理商: CXD2585Q
– 12 –
CXD2585Q
[1] CPU Interface
§ 1-1. CPU Interface Timing
CPU interface
This interface uses DATA, CLOK and XLAT to set the modes.
The interface timing chart is shown below.
The internal registers are initialized by a reset when XRST = 0.
§ 1-2. CPU Interface Command Table
Total bit length for each register
Register
0 to 2
3
4 to 6
7
8
9
A
B
C
D
E
8 bits
8 to 24 bits
16 bits
20 bits
28 bits
28 bits
28 bits
24 bits
28 bits
20 bits
20 bits
Total bit length
750ns or more
D18
D19
D20
D21
D22
D23
750ns or more
Valid
CLOK
DATA
XLAT
Registers
D0
D1
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