參數(shù)資料
型號(hào): CXD2510Q
廠商: Sony Corporation
元件分類: 數(shù)字信號(hào)處理
英文描述: CD Digital Signal Processor
中文描述: CD數(shù)字信號(hào)處理器
文件頁(yè)數(shù): 3/48頁(yè)
文件大?。?/td> 743K
代理商: CXD2510Q
– 3 –
CXD2510Q
I
O
O
O
O
O
O
I
I
O
O
I
O
I
O
I
I
I
I
O
I
I
O
O
Pin Description
Pin
No.
Symbol
I/O
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
FOK
FSW
MON
MDP
MDS
LOCK
NC
VCOO
VCOI
TEST
PDO
Vss
TEST0
NC
NC
VPCO
VCKI
FILO
FILI
PCO
AVss
CLTV
AV
DD
RF
BIAS
ASYI
ASYO
ASYE
NC
PSSL
WDCK
LRCK
V
DD
Z, 0
1, 0
1, Z, 0
1, Z, 0
1, 0
1, 0
1, Z, 0
1, Z, 0
Analog
1, Z, 0
1, 0
1, 0
1, 0
Focus OK input. Used for SENS output and the servo auto sequencer.
Spindle motor output filter switching output.
Spindle motor on/off control output.
Spindle motor servo control.
Spindle motor servo control.
GFS is sampled at 460Hz; when GFS is high, this pin outputs a high signal.
If GFS is low eight consecutive samples, this pin outputs low.
Analog EFM PLL oscillation circuit output.
Analog EFM PLL oscillation circuit input. f
LOCK
= 8.6436MHz.
TEST pin. Normally GND.
Analog EFM PLL charge pump output.
GND
TEST output pin. Normally open.
Variable pitch PLL charge pump output.
Variable pitch clock input from the external VCO. fc center = 16.9344MHz.
Master PLL filter output.
Master PLL filter input.
Master PLL charge pump output.
Analog GND.
Master VCO control voltage input.
Analog power supply (5V).
EFM signal input.
Constant current input of the asymmetry circuit.
Asymmetry comparator voltage input.
EFM full-swing output (low = Vss, high = V
DD
).
Low: asymmetry circuit off; high: asymmetry circuit on
Audio data output mode switching input. Low: serial output; high: parallel output.
D/A interface for 48-bit slot. Word clock f = 2Fs.
D/A interface for 48-bit slot. LR clock f = Fs.
Power supply (5V).
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