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CXD2510Q
Description of peak meter mode
(see the Timing Chart 1-5.)
When the LSI is set to this mode, the maximum PCM data value is detected regardless of if it comes from the
left or right channel.
The 96-bit clock must be input to SQCK to read out this data.
When the 96-bit clock is input, 96 bits of data are output to SQSO and the LSI internal register is reset.
In other words, the PCM maximum value detection register is not reset by the readout.
To reset the PCM maximum value register, set PCT1 = PCT2 = 0 or set the $AX mute.
The Sub Q absolute time is automatically controlled in this mode.
In other words, after the maximum value is generated, the absolute time for CRC to become OK is retained in
the memory. Relative time operates as normal.
The final bit (L/R flag) of the 96-bit data is normally 0.
The pre-value hold and average value interpolation data are fixed to level (–
∞
) for this mode.
Command
Data 1
Data 2
Data 3
Data 4
D3
D2
D1
D0
D3
D2
D1
D0
D3
D2
D1
D0
D3
D2
D1
D0
2
15
2
14
2
13
2
12
2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
Traverse monitor count
setting
When the set number of tracks are counted during fine search, the sled control for the traverse cycle control
goes off.
The traverse monitor count is set when the traverse status is monitored by the SENS output COMP and
COUT.
$BX commands
This command sets the traverse monitor count.
Servo coefficient
setting
CLV CTRL ($DX)
Gain
MDP1
Gain
MDP0
Gain
MDS1
Gain
MDS0
Gain
CLVS
Gain
MDS1
0
0
0
0
1
1
Gain
MDS0
0
0
1
1
0
0
Gain
CLVS
0
1
0
1
0
1
GCLVS
–12dB
–6dB
–6dB
0dB
0dB
+6dB
Command
D3
Data 1
D2
D1
D0
Gain
DCLV0
0
0
0
D3
Data 2
Explanation
Valid only when DCLV = 1.
Valid when DCLV = 1 or 0.
D2
D1
D0
$CX commands
The spindle servo gain is externally set when DCLV = 1.
CLVS mode gain setting: GCLVS
Note)
When DCLV = 0, the CLVS gain is as follows.
When Gain CLVS = 0, GCLVS = –12dB.
When Gain CLVS = 1, GCLVS = 0dB.