參數(shù)資料
型號(hào): CXA1871S
廠商: Sony Corporation
元件分類: 外設(shè)及接口
英文描述: Single Supply RS232C Line Driver/Receiver(?????μ?o?RS232C ?o?????????¨???2???2??????)
中文描述: 單電源RS232C接口線路驅(qū)動(dòng)器/接收器(單電源RS232C接口線收發(fā)器(2發(fā)2收))
文件頁(yè)數(shù): 33/46頁(yè)
文件大小: 639K
代理商: CXA1871S
—33—
CXA1871S
3. RGB interface system
YS/YM switching is performed according to the amplitude of the OSD RGB input blanking signal input from
Pin 14.
0 to 1.5 V
TV (Y/C input)
1.5 to 3.5 V
TV –6 dB
3.5 to 5.5 V
Black
The R, G and B signals of the Y/C system pass through the RGB switch (BLUE and BLACK ON/OFF) and
receive picture control. These signals are mixed with the digital R, G and B signals (specified input level 0
to 5 V DC) input from Pins 15, 16 and 17, passed through the dynamic color, gamma correction, bright
control, drive adjustment (R channel is fixed, G and B channels are variable.), cut-off adjustment (R channel
is fixed, G and B channels are variable.) and auto cut-off DC level shift circuits, and then output from Pins
19, 21 and 23 as the R, G and B signals. The RGB output amplitude has a limit voltage whose setting
value can be controlled with the I
2
C bus register. The digital R, G and B signals are mainly used for on
screen display of channels, etc. and the display level can be set with the I
2
C bus register.
The signal input to Pin 26 (ABL IN) is compared with the internal reference voltage and is then integrated by
the capacitor connected to Pin 28 (ABL LPF) for picture and brightness control. Picture ABL mode and
combined picture ABL and brightness ABL mode can be switched with the I
2
C bus register.
Note)
When the digital R, G and B signals and OSDBLK signal are not used, connect Pins 14, 15, 16 and 17 to
GND.
Auto cut-off
For white balance, drive control (gain control between R, G and B outputs) and cut-off control (black side
DC level control) are involved. This IC uses the I
2
C bus register for drive control. For cut-off control, a loop
is formed between the IC and CRT to achieve auto cut-off control.
This auto cut-off arrangement makes it possible to compensate for CRT changes with time. To absorb the
CRT variance, the cut-off voltages of the G and B outputs are adjusted by the I
2
C bus register.
The auto cut-off loop is configured as described below.
(1) R, G and B reference pulses for auto cut-off, shifted 1H each in the order mentioned, are added to
the top of the picture.
(2) The IK of each of the R, G and B outputs is converted to a voltage and input to Pin 24.
(3) The voltage input to Pin 24 is compared with the reference voltage in the IC to change the DC level
of the reference pulses.
The loop mentioned above determines the shift level of the R, G and B outputs and lets the capacitances
connected to Pins 18, 20 and 22 hold the DC shift level during the 1 V period. If the voltage at any one of
Pins 18, 20 and 22 is less than 4.2 V, the status register IK (bit 6) becomes “1”. Use this information to
blank the R, G and B outputs with the I
2
C bus register. The positions of the reference pulses can be
changed by the I
2
C bus register.
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