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參數(shù)資料
| 型號： | CXA1871S |
| 廠商： | Sony Corporation |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Single Supply RS232C Line Driver/Receiver(?????μ?o?RS232C ?o?????????¨???2???2??????) |
| 中文描述： | 單電源RS232C接口線路驅(qū)動器/接收器（單電源RS232C接口線收發(fā)器（2發(fā)2收）） |
| 文件頁數(shù)： | 32/46頁 |
| 文件大?。?/td> | 639K |
| 代理商： | CXA1871S |
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CXA1871S
2. Y/C system
The Y/C system has the following three input systems.
Composite video input (1 Vp-p/2 Vp-p)
→
2 systems (The gain can be switched between 0 and 6 dB for
both systems.)
1 system
Y/C separation input (2 Vp-p)
→
The Y signal (specified input level 2 Vp-p) input to Pin 10 is passed through the sub-contrast control,
chroma trap (or delay line), delay line, sharpness control, noise reduction, clamp and auto pedestal circuits.
The signal is then mixed with the color difference signal, passed through the clamp and Y/C MIX circuits
again, and input to the RGB interface system block.
Since a built-in chroma trap is provided, the video signal can be directly input. Trap frequency adjustment
is not necessary as a dummy filter is provided inside the IC and feedback is applied using the 3.58 MHz or
4.43 MHz signal generated by a crystal oscillator for reference. When the chroma trap is off, the Y system
frequency response is approximately 8 MHz, –3 dB for R, G and B outputs.
Sharpness control is delay line type with a variable PRE/OVER ratio.
Dynamic picture control consists of pulling in the signal below 40 IRE to the black side so that the signal
black peak held by Pin 11 becomes the pedestal level.
The chroma signal (specified input level, burst 570 mVp-p, or video signal 2 Vp-p) input to Pin 12 is passed
through the ACC and TOT, and the burst only is set to the maximum gain by the B.G. This burst is then
peak detected by ACC DET, level controlled by the I
2
C bus register, and fed back to the ACC again. When
the B.G. output burst signal is smaller than a certain level, killer turns on, the chroma signal is replaced with
DC by the B.G., and the color gain is set to the minimum. The burst signal is detected using the VCO
oscillation output which has received hue control as the carrier, and a signal (the R-Y axis sub-carrier due
to chroma demodulation) whose phase is offset 90° from the burst signal is generated. During PAL input,
this sub-carrier is inverted 180° every 1 H and output. The phase is not inverted during NTSC input. The
chroma signal is demodulated into the color difference signals R-Y and B-Y by this sub-carrier. The signal
is set to 6 dB during NTSC input, or passed through the 1 H delay line and set to 0 dB during SECAM and
PAL input, after which it is input to the matrix circuit where the G-Y color difference signal is generated.
Then, the color difference signals are passed through the Y/C MIX circuit, and input together with the Y
signal to the RGB interface system block.
The detective axis (NTSC/PAL) can be switched by the I
2
C bus register.
NTSC or PAL input is automatically identified and output to the status register. In addition, during PAL
input, the phase relationship between the burst and R-Y sub-carrier is detected. If a phase error is detected
at this time, it is corrected by applying feedback to the flip flop.
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