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參數(shù)資料
| 型號： | CX74038-12 |
| 廠商： | SKYWORKS SOLUTIONS INC |
| 元件分類： | XO, clock |
| 英文描述： | 2.6 GHz/800 MHz Dual Fractional-N/lnteger-N Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 2600 MHz, PDSO20 |
| 封裝： | 6.5 X 4.4 MM, 1 MM HEIGHT, TSSOP-20 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 114K |
| 代理商： | CX74038-12 |
DATA SHEET CX74038
Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 sales@skyworksinc.com www.skyworksinc.com
10
January 31, 2005 Skyworks Proprietary and Confidential information Products and product information are subject to change without notice 101075I
Table 5. CX74038 Register Descriptions (2 of 2)
Symbol
Function
Description
Register Word Address 10
Address bits [1:0]
10
SP2
IF synthesizer phase detector output polarity
[2]
Bit [2] sets the IF synthesizer phase detector output:
0 Sets phase detector output for negative VCO gain
1 Sets phase detector output for positive VCO gain
EN
Enable mode [4:3]
Bits [4:3] enable the RF and/or IF synthesizers:
bit 4
bit 3
0
Enables both RF SX and IF SX
0
1
Enables only RF SX
1
0
Enables only IF SX
1
Sets power-down mode for both RF/IF SX
N2
IF synthesizer main divider [21:5]
Bits [21:5] set the IF synthesizer 17-bit main divider ratio
Register Word Address 11
Address bits [1:0]
11
FN
RF synthesizer fractional-N division [9:2]
Bits [9:2] set the RF synthesizer’s fractional-N program up to 256 modulo
N1
RF synthesizer main divider [21:10]
Bits [21:10] set the RF synthesizer’s 12-bit main divider ratio with a 16/17 prescaler, or an
11-bit main divider ratio with 8/9 prescaler
Note 1: These bits must be programmed after power is applied to the device. Failure to do so may result in erroneous device operation.
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