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參數(shù)資料
| 型號(hào)： | CX72301-11 |
| 廠商： | SKYWORKS SOLUTIONS INC |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 1000 MHz, PDSO28 |
| 封裝： | EXPOSED PAD, TSSOP-28 |
| 文件頁(yè)數(shù)： | 4/20頁(yè) |
| 文件大小： | 165K |
| 代理商： | CX72301-11 |
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DATA SHEET CX72301
Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 sales@skyworksinc.com www.skyworksinc.com
12
July 21, 2004 Skyworks Proprietary and Confidential information Products and Product Information are Subject to Change Without Notice 101090H
Auxiliary Synthesizer Power Down = 1-bit value that powers
down the auxiliary synthesizer. When this bit is 0, the auxiliary
synthesizer is powered up. When this bit is 1, the auxiliary
synthesizer is in power-down mode.
Auxiliary Synthesizer mode = 1-bit value that powers down the
auxiliary synthesizer’s
Σ modulator and fractional unit to
operate as an integer-N synthesizer. When this bit is 0, the
auxiliary synthesizer is in fractional-N mode. When this bit is 1,
the auxiliary synthesizer is in integer-N mode.
NOTE: There are no special power-up sequences required for
the CX72301.
Multiplexer Output Selection = 3-bit value that selects which
internal signal is output to the Mux_out pin. Internal signals
available on this pin are the following:
Reference Oscillator, F
ref
Main or auxiliary divided reference (post reference
frequency main or auxiliary dividers), Fref_main or Fref_aux
Main or auxiliary phase detector frequency (post main and
auxiliary frequency dividers), Fpd_main or Fpd_aux
Serial data out, for loop-back and test purposes
See Table 4 for more information.
Mux_out Pin Three-State Enable = 1-bit value to three-state the
Mux_out pin. When this bit is 0, the Mux_out pin is enabled.
When this bit is 1, the Mux_out pin is three-stated.
A3
A2 A1
A0 11
10
9
8
7
6
5
4
3
2
1
0
01
11
X
MSB
LSB
Full Power Down
Main Synthesizer Power Down
Main Synthesizer Mode
Main Synthesizer
Σ Fractionality
Auxiliary Synthesizer Power Down
Auxiliary Synthesizer Mode
Multiplexer Output Selection
Mux_out Pin Three-State Enable
C1424
Figure 13. Power Down and Multiplexer Output Register (Write Only)
Table 4. Multiplexer Output
Multiplexer Output Select
(Bit 8)
Multiplexer Output Select
(Bit 7)
Multiplexer Output Select
(Bit 6)
Multiplexer Output
(Mux_out)
0
Reference Oscillator
0
1
Auxiliary Reference Frequency (Fref_aux)
0
1
0
Main Reference Frequency (Fref_main)
0
1
Auxiliary Phase Detector Frequency (Fpd_aux)
1
0
Main Phase Detector Frequency (Fpd_main)
1
0
1
Serial data out
1
0
Serial Interface Register test output
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