參數(shù)資料
型號(hào): CX72301-11
廠商: SKYWORKS SOLUTIONS INC
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 1000 MHz, PDSO28
封裝: EXPOSED PAD, TSSOP-28
文件頁數(shù): 3/20頁
文件大?。?/td> 165K
代理商: CX72301-11
DATA SHEET CX72301
Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 sales@skyworksinc.com www.skyworksinc.com
101090H Skyworks Proprietary and Confidential information Products and Product Information are Subject to Change Without Notice July 21, 2004
11
Table 3. Programming the Auxiliary Reference Frequency Divider
Decimal
Bit 9 (MSB)
Bit 8
Bit 7
Bit 6
Bit 5 (LSB)
Reference Divider
Ratio
0
1
0
1
2
0
1
0
3
31
1
32
A3
A2 A1
A0 11
10
9
8
7
6
5
4
3
2
1
0
01
X
Main Reference Frequency Divider Index
Auxiliary Reference Frequency Divider Index
C1422
Figure 11. Reference Frequency Dividers Register (Write Only)
A3
A2 A1
A0 11
10
9
8
7
6
5
4
3
2
1
0
01
10
Main Phase Detector Gain
Main Power Steering/Lock Detect Enable
Auxiliary Phase Detector Gain
Auxiliary Power Steering/Lock Detect Enable
C1423
Figure 12. Control Register (Write Only)
The Power Down and Multiplexer Output Register allows control
of the power-down modes, internal multiplexer output, and main
Σ synthesizer fractionality. As shown in Figure 13, the values to
be loaded are:
Full Power-Down = 1-bit value that powers down the CX72301
except for the reference oscillator and the serial interface. When
this bit is 0, the CX72301 is powered up. When this bit is 1, the
CX72301 is in full power-down mode excluding the Mux_out
pin.
Main Synthesizer Power-Down = 1-bit value that powers down
the main synthesizer. When this bit is 0, the main synthesizer is
powered up. When this bit is 1, the main synthesizer is in
power-down mode.
Main Synthesizer Mode = 1-bit value that powers down the
main synthesizer’s
Σ modulator and fractional unit to operate
as an integer-N synthesizer. When this bit is 0, the main
synthesizer is in a fractional-N mode. When this bit is 1, the
main synthesizer is in integer-N mode.
Main Synthesizer Σ Fractionality = 1-bit value that configures
the size of the main
Σ modulator. This has a direct effect on
power consumption and on the level of fractionality and step
size. When this bit is 0, the main
Σ modulator is 18-bit with a
fractionality of 218 and a step size of Fref_main/262144. When this
bit is 1, the main
Σ modulator is 10-bit with a fractionality of
210 and a step size of Fref_main/1024.
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