參數(shù)資料
型號(hào): CT2555-FP
廠商: Aeroflex Inc.
英文描述: CT2553 / 2554 / 2555 / 2556 Advanced Integrated MUX (AIM) Hybrid FOR MIL-STD-1553
中文描述: CT2553 / 2554 /二千五百五十六分之二千五百五十五高級(jí)集成復(fù)用器(AIM)的混合的MIL - STD - 1553的
文件頁數(shù): 25/36頁
文件大小: 352K
代理商: CT2555-FP
Aeroflex Circuit Technology
25
SCDCT2553 REV B 8/6/99 Plainview NY (516) 694-6700
A02
A01
A00
SSFLAG, SSBUSY, SVCRQST
DBAC, RTU/BC, MT, CTLOUT B/A
MEM/REG
D15-D00
IOEN
SELECT
STRBD
(Internal)
16MHz Clock
RD/WR
READYD
See Note 1
td1
td2
td8
tpw1
td7
td9
DATA LATCHED
Configuration Register Only
DATA VALID
Figure 28 – CPU Writes to Internal Register
CPU Writes to Internal Register
SYMBOL
DESCRIPTION
MIN
MAX
UNITS
td1
READYD low delay (CPU Handshake)
-
150
ns
td2
IOEN high delay (CPU Handshake)
-
20
ns
tpw1
READYD pulse width (CPU Handshake)
50
-
ns
td7
Internal Register delay (write)
-
60
ns
td8
Register Data/Address set-up time
-
30
ns
td9
Register Data/Address hold time
-
0
ns
tr
READYD to STRBD release
-
1.37
μs
tz
(SELECT
STRBD) to IOEN
-
1.8
μs
tz
tr
See Note 2
NOTE:
1. STRBD to IOEN (low) delay is two clock cycles. If contention occurs, delay is two clock cycles following release of bus.
2. CPU must release STRBD within 1.5μs of IOEN going active. READYD will go away within one clock cycle maximum.
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CT2553 CT2553 / 2554 / 2555 / 2556 Advanced Integrated MUX (AIM) Hybrid FOR MIL-STD-1553
CT2554 CT2553 / 2554 / 2555 / 2556 Advanced Integrated MUX (AIM) Hybrid FOR MIL-STD-1553
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