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CSR2930800BA
-90
20
7.
Extended Command
(1) Fast Mode
CSR2930800BA has Fast Mode function. This mode dispenses with the initial two unclock cycles required in
the standard program command sequence by writing Fast Mode command into the command register. In this
mode, the required bus cycle for programming is two cycles instead of four bus cycles in standard program
command. (Do not write erase command in this mode.) The read operation is also executed after exiting this
mode. To exit this mode, it is necessary to write Fast Mode Reset command into the command register. (Refer
to “8. Embedded Program
TM
Algorithm for Fast Mode” in “
I
FLOW CHART” Extended algorithm.) The V
CC
active
current is required even CE = V
IH
during Fast Mode.
(2) Fast Programming
During Fast Mode, the programming can be executed with two bus cycles operation. The Embedded Program
Algorithm is executed by writing program set-up command (A0h) and data write cycles (PA/PD). (Refer to “8.
Embedded Program
TM
Algorithm for Fast Mode” in “
I
FLOW CHART” Extended algorithm.)
(3) Extended Sector Protection
In addition to normal sector protection, the CSR2930800BA has Extended Sector Protection as extended func-
tion. This function enable to protect sector by forcing V
ID
on RESET pin and write a commnad sequence. Unlike
conventional procedure, it is not necessary to force V
ID
and control timing for control pins. The only RESET pin
requires V
ID
for sector protection in this mode. The extended sector protect requires V
ID
on RESET pin. With this
condition, the operation is initiated by writing the set-up command (60h) into the command register. Then, the
sector addresses pins (A
18
, A
17
, A
16
, A
15
, A
14
, A
13
and A
12
) and (A
6
, A
1
, A
0
) = (0, 1, 0) should be set to the sector
to be protected (recommend to set V
IL
for the other addresses pins), and write extended sector protect command
(60h). A sector is typically protected in 150
μ
s. To verify programming of the protection circuitry, the sector
addresses pins (A
18
, A
17
, A
16
, A
15
, A
14
, A
13
and A
12
) and (A
6
, A
1
, A
0
) = (0, 1, 0) should be set and write a command
(40h). Following the command write, a logical “1” at device output DQ
0
will produce for protected sector in the
read operation. If the output data is logical “0”, please repeat to write extended sector protect command (60h)
again. To terminate the operation, it is necessary to set RESET pin to V
IH
.
Write Operation Status
Hardware Sequence Flags Table
8.
*1:Performing successive read operations from any address will cause DQ
6
to toggle.
*2:Reading the byte address being programmed while in the erase-suspend program mode will indicate logic “1”
at the DQ
2
bit. However, successive reads from the erase-suspended sector will cause DQ
2
to toggle.
Notes:
DQ
0
and DQ
1
are reserve pins for future use.
DQ
4
is internal use only.
Status
DQ
7
DQ
6
DQ
5
DQ
3
DQ
2
In Progress
Embedded Program Algorithm
DQ
7
Toggle
0
0
1
Embedded Erase Algorithm
0
Toggle
0
1
Toggle
Erase
Suspended Mode
Erase Suspend Read
(Erase Suspended Sector)
1
1
0
0
Toggle
Erase Suspend Read
(Non-Erase Suspended Sector)
Data
Data
Data
Data
Data
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle *
1
0
0
1 *
2
Exceeded
Time Limits
Embedded Program Algorithm
DQ
7
Toggle
1
0
1
Embedded Erase Algorithm
0
Toggle
1
1
N/A
Erase
Suspended Mode
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
1
0
N/A