(Inputs: Logic 0 = 0 V, Logic 1 = VL; CL
參數(shù)資料
型號: CS8406-DZZ
廠商: Cirrus Logic Inc
文件頁數(shù): 25/28頁
文件大小: 0K
描述: IC XMITTER DGTL 192KHZ 28TSSOP
標準包裝: 50
類型: 數(shù)字音頻接口發(fā)射器
應(yīng)用: 車載音頻
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 759 (CN2011-ZH PDF)
配用: 598-1017-ND - BOARD EVAL FOR CS8416 RCVR
其它名稱: 598-1722
6
DS580F6
CS8406
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS
(Inputs: Logic 0 = 0 V, Logic 1 = VL; CL = 20 pF)
Notes:
5. The active edge of ISCLK is programmable in Software Mode.
6. The polarity of ILRCK is programmable in Software Mode.
7. Prevents the previous ISCLK edge from being interpreted as the first one after ILRCK has changed.
8. This setup time ensures that this ISCLK edge is interpreted as the first one after ILRCK has changed.
Parameter
Symbol
Min
Typ
Max
Units
SDIN Setup Time Before ISCLK Active Edge
tds
10
-
ns
SDIN Hold Time After ISCLK Active Edge
tdh
8-
-
ns
Master Mode
OMCK to ISCLK active edge delay
tsmd
0-
17
ns
OMCK to ILRCK delay
tlmd
0-
16
ns
ISCLK and ILRCK Duty Cycle
-
50
-
%
Slave Mode
ISCLK Period
tsckw
36
-
ns
ISCLK Input Low Width
tsckl
14.4
-
ns
ISCLK Input High Width
tsckh
14.4
-
ns
ISCLK Active Edge to ILRCK Edge
tlrckd
10
-
ns
ILRCK Edge Setup Before ISCLK Active Edge
tlrcks
10
-
ns
ISCLK
ILRCK
(output)
OMCK
(input)
t smd
t lmd
sckh
sckl
sckw
t
(input)
SDIN
dh
t
ds
t
lrcks
t
lrckd
t
ISCLK
ILRCK
Figure 1. Audio Port Master Mode Timing
Figure 2. Audio Port Slave Mode and Data Input Timing
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CS8406-DZZR 功能描述:音頻發(fā)送器、接收器、收發(fā)器 IC 192 kHz Digital Audio Transmitter RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數(shù)量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝:
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