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參數(shù)資料
| 型號： | CS5533-ASZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 32/43頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 2CH W/LNA 24-SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 3.84k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 45mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個(gè)差分，單極；4 個(gè)差分，雙極 |
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CS5531/32/33/34-AS
38
DS289F5
2.9. Digital Filter
The CS5531/32/33/34 have linear phase digital fil-
ters which are programmed to achieve a range of
output word rates (OWRs) as stated in the Channel-
Setup Register Descriptions section. The ADCs use
a Sinc5 digital filter to output word rates at 3200
Sps and 3840 Sps (MCLK = 4.9152 MHz). Other
output word rates are achieved by using the Sinc5
filter followed by a Sinc3 filter with a programma-
ble decimation rate. Figure 16 shows the magnitude
response of the 60 Sps filter, while Figures 17 and
18 show the magnitude and phase response of the
filter at 120 Sps. The Sinc3 is active for all output
word rates except for the 3200 Sps and 3840 Sps
(MCLK = 4.9152 MHz) rate. The Z-transforms of
the two filters are shown in Figure 19. For the Sinc3
filter, “D” is the programmable decimation ratio,
which is equal to 3840/OWR when FRS = 0 and
3200/OWR when FRS = 1.
The converter’s digital filters scale with MCLK.
For example, with an output word rate of 120 Sps,
the filter’s corner frequency is at 31 Hz. If MCLK
is increased to 5.0 MHz, the OWR increases by
1.0175% and the filter’s corner frequency moves to
31.54 Hz. Note that the converter is not specified to
run at MCLK clock frequencies greater than
5MHz.
Figure 16. Digital Filter Response (WR = 60 Sps)
-120
-80
-40
0
Gain
(dB)
0
60
120
180
240
300
Frequency (Hz)
-120
-80
-40
0
040
80
120
Frequency (Hz)
G
a
in
(
d
B
)
Flatness
Frequency
dB
2-0.01
4-0.05
6-0.11
8-0.19
10
-0.30
12
-0.43
14
-0.59
16
-0.77
19
-1.09
32
-3.13
Figure 17. 120 Sps Filter Magnitude Plot to 120 Hz
-180
-90
0
90
180
0
30
60
90
120
Frequency (Hz)
P
h
ase
(
D
eg
rees)
Figure 18. 120 Sps Filter Phase Plot to 120 Hz
Note:
See the text regarding the Sinc3 filter’s
decimation ratio “D”.
Sinc5
1
z 80
–
()5
1
z 16
–
()5
--------------------------
1
z 16
–
()3
1
z 4
–
()3
--------------------------
1
z 4
–
()2
1
z 2
–
()2
-----------------------
1
z 2
–
()3
1
z 1
–
()3
-----------------------
×
=
Sinc3
1
z D
–
()3
1
z 1
–
()3
-------------------------
=
Figure 19. Z-Transforms of Digital Filters
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS5534 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA |
| CS5534-AS | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5534-ASR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 24-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5534-ASZ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 4-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5534-ASZR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 24-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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