參數(shù)資料
型號： CS4360-DZZR
廠商： Cirrus Logic Inc
文件頁數(shù)： 19/37頁
文件大?。?/td> 0K
描述： IC DAC STER 6CH 102DB 28-TSSOP
標準包裝： 4,000
位數(shù)： 24
數(shù)據(jù)接口： 串行
轉換器數(shù)目： 6
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 265mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應商設備封裝： 28-TSSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 6 電壓，單極
采樣率（每秒）： 192k
CS4360
26
DS517F2
4.9.1
Memory Address Pointer (MAP)
The MAP byte precedes the control port register byte during a write operation and is not available again
until after a start condition is initiated. During a read operation the byte transmitted after the ACK will con-
tain the data of the register pointed to by the MAP (see sections 4.9.1a and 4.9.3 for write/read details).
4.9.1a
INCR (Auto Map Increment)
The device has MAP auto increment capability enabled by the INCR bit (the MSB) of the MAP. If INCR is
set to 0, MAP will stay constant for successive IC writes or reads and SPI writes. If INCR is set to 1, MAP
will auto increment after each byte is written, allowing block reads or writes of successive registers.
Default = ‘0’
0 - Disabled
1 - Enabled
4.9.1b
MAP0-3 (Memory Address Pointer)
Default = ‘0000’
4.9.2
IC Mode
In the IC mode, data is clocked into and out of the bi-directional serial control data line, SDA, by the serial
control port clock, SCL. There is no CS pin. Pin AD0 enables the user to alter the chip address
(001000[AD0][R/W]) and should be tied to VLC or GND as required, before powering up the device. If the
device ever detects a high-to-low transition on the AD0/CS pin after power-up, SPI mode will be selected.
4.9.2a
IC Write
To write to the device, follow the procedure below while adhering to the control port Switching Specifica-
tions in section 3.
1) Initiate a START condition to the IC bus followed by the address byte. The upper 6 bits must be
001000. The seventh bit must match the setting of the AD0 pin, and the eighth must be 0. The eighth
bit of the address byte is the R/W bit.
2) Wait for an acknowledge (ACK) from the device, then write to the memory address pointer, MAP. This
byte points to the register to be written.
3) Wait for an acknowledge (ACK) from the device, then write the desired data to the register pointed to
by the MAP.
4) If the INCR bit (see section 4.9.1a) is set to 1, repeat the previous step until all the desired registers
are written, then initiate a STOP condition to the bus.
5) If the INCR bit is set to 0 and further IC writes to other registers are desired, it is necessary to repeat
the procedure detailed from step 1. If no further writes to other registers are desired, initiate a STOP
condition to the bus.
76543
210
INCR
Reserved
MAP3
MAP2
MAP1
MAP0
00000
000
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相關代理商/技術參數(shù)
參數(shù)描述
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CS4360-KZZ 功能描述:數(shù)模轉換器- DAC IC 102dB 24Bit 192kHz 6 ch DAC RoHS:否 制造商:Texas Instruments 轉換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
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