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參數(shù)資料
| 型號： | CS2100P-DZZR |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | PLL合成/DDS/VCOs |
| 中文描述： | PHASE LOCKED LOOP, 30 MHz, PDSO10 |
| 封裝： | 3 MM, LEAD FREE, MO-187, MSOP-10 |
| 文件頁數(shù)： | 6/25頁 |
| 文件大小： | 223K |
| 代理商： | CS2100P-DZZR |
CS2100-OTP
14
DS841F2
While acquiring lock, the digital loop bandwidth is automatically set to a large value. Once lock is
achieved, the digital loop bandwidth will settle to the minimum value selected by the ClkIn_BW[2:0] pa-
rameter.
5.4
Output to Input Frequency Ratio Configuration
5.4.1
User Defined Ratio (RUD)
The User Defined Ratio, RUD, is a 32-bit un-signed fixed-point number which determines the basis for the
desired input to output clock ratio. Up to four different ratios, Ratio0-3, can be stored in the CS2100’s one
time programmable memory. Selection between the four ratios is achieved by the M[1:0] mode select
pins. The 32-bit RUD can be expressed in either a high resolution (12.20) or high multiplication (20.12)
format selectable by the LFRatioCfg global parameter.
The RUD for high resolution (12.20) format is encoded with 12 MSBs representing the integer binary por-
tion with the remaining 20 LSBs representing the fractional binary portion. The maximum multiplication
factor is approximately 4096 with a resolution of 0.954 PPM in this configuration. See “Calculating the
User Defined Ratio” on page 23 for more information.
The RUD for high multiplication (20.12) format is encoded with 20 MSBs representing the integer binary
portion with the remaining 12 LSBs representing the fractional binary portion. In this configuration, the
maximum multiplication factor is approximately 1,048,575 with a resolution of 244 PPM. It is recommend-
ed that the 12.20 High-Resolution format be utilized whenever the desired ratio is less than 4096 since
the output frequency accuracy of the PLL is directly proportional to the accuracy of the timing reference
clock and the resolution of the RUD.
The status of internal dividers, such as the internal timing reference clock divider, are automatically taken
into account. Therefore RUD is simply the desired ratio of the output to input clock frequencies.
Referenced Control
Parameter Definition
ClkIn_BW[2:0] ....................... “Clock Input Bandwidth (ClkIn_BW[2:0])” on page 22
Referenced Control
Parameter Definition
Ratio 0-3................................“Ratio 0 - 3” on page 21
LFRatioCfg ............................ “Low-Frequency Ratio Configuration (LFRatioCfg)” on page 22
M[1:0] ....................................“M1 and M0 Mode Pin Functionality” on page 17
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