參數(shù)資料
型號(hào)： CMA8864-04
廠(chǎng)商： Electronic Theatre Controls, Inc.
英文描述： I2C, Mixed Voltage clock Synthesizer with Buffer for PENTIUMTM & II CPU/PCI system
中文描述： I2C和混合帶緩沖區(qū)PENTIUMTM電壓時(shí)鐘合成器
文件頁(yè)數(shù)： 8/9頁(yè)
文件大小： 105K
代理商： CMA8864-04
CMEI 8 CMA8864-04
6F, No. 100, Sec. 4, Civil Boulevard, Taipei, Taiwan
TEL: (02)8773-1100 FAX: 886-2-8773-2211
WWW : http://www.cmedia.com.tw
Ver. 1.2
DC CHARACTERISTICS
SYMBOL
Idd
Vil
Vih
Iil
Voh2
Vol2
Voh3
Vol3
Vpoh
PCI bus Output High Voltage
Vpol
PCI bus Output High Voltage
Ioz
Tristate Leakage Current
Isc
Short Circuit Current
PARAMETER
Dynamic Supply Current
Input Low Voltage
Input High Voltage
Input Leakage Current
2.5V Output High Voltage
2.5V Output Low Voltage
3.3V Output High Voltage
3.3V Output Low Voltage
MIN.
-
VSS-0.3
2.0
-5
2.0
-
2.4
-
2.4
-
-
25
MAX.
TBD
0.8
VDD-0.3
+5
-
0.4
-
0.4
-
0.55
10
-
UNIT
mA
VDC
VDC
uA
V
V
V
V
V
V
uA
mA
CONDITION
CPU=66.6MHz, PCI=33.3MHz
VDD=3.3V
0<Vin<VDD
VDDL=2.375V to 2.9V, Ioh=-1mA
VDDL=2.375V to 2.9V, Iol=1mA
VDD3=
3.3V
ó%, Ioh=-1mA
VDD3=
3.3V
ó%, Iol=1mA
VDD2=
3.3V
ó%, Ioh=-1mA
VDD2=
3.3V
ó%, Iol=1mA
ó%
1 output at a time - 30 seconds
AC CHARACTERISTICS
SYMBOL
T
Hrise,
T
Hfall
Host clock Rise and Fall Time
T
HCP
Host Clock Period
T
HCH
Host Clock High Time
T
HCL
Host Clock Low Time
Duty Cycle
T
HSKW
Buffer out Skew All Host CLK
T
JAB
Jitter absolute, Host clock
T
STB
Host/PCI clock stabilization
PARAMETER
MIN.
0.4
15/16.7
5.2/6.0
5.0/5.8
45
-
-
-
Typ.
MAX. UNIT
1.6
-
-
-
55
250
250
3
CONDITION
ns
ns
ns
ns
%
ps
ps
ms
20pf load/CPU and PCI outputs
Measured at 1.25V, 66/60MHz
Measured at 2.0V, 66/60MHz
Measured at 0.4V, 66/60MHz
Refer to Notes below
Refer to Notes below
Refer to Notes below
Refer to Notes below,
VDDL=3.3V
Refer to Notes below
Refer to Notes below
Measured at 1.5V, 66/60MHz
Measured at 2.4, 66/60MHz
Measured at 0.4, 66/60MHz
Refer to Notes below
Vol=1.5V
Voh=1.5V
-
-
Duty cycle
50
-
-
-
from power-up
Host to PIC Offset
Host to SDRAM skew
PCI clock period
PCI clock High Time
PCI clock Low Time
Buffer out skew all PCICLK
Switching Current Low
Switching Current High
Toff
T
HSSKW
T
PCP
T
PCH
T
PCL
T
PSKW
Iol
Ioh
1.0
-
-
-
-
-
-
-
4.0
250
-
-
-
500
TBD
TBD
ns
ps
ns
ns
ns
ps
mA
mA
30/33.3
12/13.3
12/13.3
-
TBD
TBD
60
60
Notes
:
Clock period, Jitter, Offset and skew are measured on the rising edge clocks at 1.25V for the 2.5V
clocks and 1.5V for the 3.3V clocks.
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