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參數(shù)資料
| 型號(hào)： | CBTL03SB212BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | DisplayPort Gen2 sideband signal multiplexer |
| 中文描述： | MULTIPLEXER, PQCC20 |
| 封裝： | 4 X 4 MM, 0.85 MM HEIGHT, PLASITC, MO-220, HVQFN-20 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 131K |
| 代理商： | CBTL03SB212BS |
CBTL03SB212
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 21 February 2011
8 of 16
NXP Semiconductors
CBTL03SB212
DisplayPort Gen2 sideband signal multiplexer
10.4 HPD input, HPD output
[1]
Low-speed input changes state on cable plug/unplug.
10.5 MUX select input
11. Test information
11.1 Switch test fixture requirements
The test fixture for switch S-parameter measurement shall be designed and built to
specific requirements, as described below, to ensure good measurement quality and
consistency.
The test fixture shall be a FR4-based PCB of the microstrip structure; the dielectric
thickness or stack-up shall be about 4 mils.
The total thickness of the test fixture PCB shall be 1.57 mm (0.062 in).
The measurement signals shall be launched into the switch from the top of the test
fixture, capturing the through-hole stub effect.
Traces between the DUT and measurement ports (SMA or microprobe) should be
uncoupled from each other, as much as possible. Therefore, the traces should be
routed in such a way that traces will diverge from each other exiting from the switch
pin field.
The trace lengths between the DUT and measurement port shall be minimized. The
maximum trace length shall not exceed 1000 mils. The trace lengths between the
DUT and measurement port shall be equal.
All of the traces on the test board and add-in card must be held to a characteristic
impedance of 50
Ω with a tolerance of ±7%.
SMA connector is recommended for ease of use. The SMA launch structure shall be
designed to minimize the connection discontinuity from SMA to the trace. The
impedance range of the SMA connector seen from a TDR with a 60 ps rise time
should be within 50
Ω± 7 Ω.
Table 10.
HPD input and output characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VI
input voltage
0.3
-
3.6
V
tPD
propagation delay
from left-side port to right-side port
or vice versa
-
100
-
ps
Table 11.
SEL, XSD_N input characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIH
HIGH-level input voltage
SEL, XSD_N
2.0
-
3.6
V
VIL
LOW-level input voltage
SEL, XSD_N
0
-
0.8
V
ILI
input leakage current
measured with input at
VIH(max) and VIL(min)
--10
μA
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| CBTL03SB212BS,515 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Gen 2 3CH Sideband Signal Multiplexer RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| CBTL04082A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CBTL04082A/B is an 8-to-4 bidirectional differential channel multiplexer/demultiplexer switch for PCI Express Generation 2 (Gen2) applications. |
| CBTL04082ABS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CBTL04082A/B is an 8-to-4 bidirectional differential channel multiplexer/demultiplexer switch for PCI Express Generation 2 (Gen2) applications. |
| CBTL04082ABS,518 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3.3V WD BW 4 DIFF CH 2:1 MULTI/DEMUX SW RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| CBTL04082BBS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CBTL04082A/B is an 8-to-4 bidirectional differential channel multiplexer/demultiplexer switch for PCI Express Generation 2 (Gen2) applications. |
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