- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄68991 > CBTL03SB212BS (NXP SEMICONDUCTORS) DisplayPort Gen2 sideband signal multiplexer PDF資料下載
參數(shù)資料
| 型號： | CBTL03SB212BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復用、解復用 |
| 英文描述： | DisplayPort Gen2 sideband signal multiplexer |
| 中文描述： | MULTIPLEXER, PQCC20 |
| 封裝： | 4 X 4 MM, 0.85 MM HEIGHT, PLASITC, MO-220, HVQFN-20 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 131K |
| 代理商： | CBTL03SB212BS |
CBTL03SB212
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 21 February 2011
7 of 16
NXP Semiconductors
CBTL03SB212
DisplayPort Gen2 sideband signal multiplexer
10. Characteristics
10.1 General characteristics
10.2 AUX channel characteristics
10.3 DDC ports
Table 7.
General characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
IDD
supply current
operating mode (XSD_N = HIGH); VDD =3.3 V
-
0.2
1
mA
shutdown mode (XSD_N = LOW); VDD = 3.3 V
-
10
μA
Ptot
total power dissipation
operating mode (XSD_N = HIGH); VDD = 3.3 V
-
5
mW
tstartup
start-up time
supply voltage valid or XSD_N going HIGH to
channel specified operating characteristics
--
10
μs
trcfg
reconfiguration time
SEL state change to channel specified
operating characteristics
--
1
μs
Table 8.
AUX channel characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VI
input voltage
0.3
-
+2.6
V
VIC
common-mode input voltage
0
-
2.0
V
VID
differential input voltage
peak-to-peak
-
+1.4
V
DDIL
differential insertion loss
channel is on; f = 100 MHz
-
0.8
-
dB
channel is on; f = 2.5 GHz
-
3-
dB
channel is off; 0 Hz
≤ f ≤ 1.0 GHz
-
30
dB
DDRL
differential return loss
channel is on; 0 Hz
≤ f ≤ 1.0 GHz
-
10
dB
DDNEXT differential near-end crosstalk
adjacent channels are on;
0Hz
≤ f ≤ 1.0 GHz
--
40
dB
B
bandwidth
3.0 dB intercept
-
2.5
-
GHz
tPD
propagation delay
from left-side port to right-side port
or vice versa
-100
-ps
tsk(dif)
differential skew time
intra-pair
-
5
-
ps
Table 9.
DDC port characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VI
input voltage
0.3
-
VDD
V
tPD
propagation delay
from left-side port to right-side port
or vice versa
-100
-
ps
相關PDF資料 |
PDF描述 |
|---|---|
| DF12D(3.5)-32DP-0.5V(81) | 32 CONTACT(S), MALE, STRAIGHT BOARD STACKING CONNECTOR, SURFACE MOUNT |
| DF12D(4.0)-32DP-0.5V(81) | 32 CONTACT(S), MALE, STRAIGHT BOARD STACKING CONNECTOR, SURFACE MOUNT |
| DF12D(5.0)-32DP-0.5V(81) | 32 CONTACT(S), MALE, STRAIGHT BOARD STACKING CONNECTOR, SURFACE MOUNT |
| DF12E(3.5)-32DP-0.5V(81) | 32 CONTACT(S), MALE, STRAIGHT BOARD STACKING CONNECTOR, SURFACE MOUNT |
| DF12E(4.0)-32DP-0.5V(81) | 32 CONTACT(S), MALE, STRAIGHT BOARD STACKING CONNECTOR, SURFACE MOUNT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CBTL03SB212BS,515 | 功能描述:編碼器、解碼器、復用器和解復用器 Gen 2 3CH Sideband Signal Multiplexer RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| CBTL04082A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CBTL04082A/B is an 8-to-4 bidirectional differential channel multiplexer/demultiplexer switch for PCI Express Generation 2 (Gen2) applications. |
| CBTL04082ABS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CBTL04082A/B is an 8-to-4 bidirectional differential channel multiplexer/demultiplexer switch for PCI Express Generation 2 (Gen2) applications. |
| CBTL04082ABS,518 | 功能描述:編碼器、解碼器、復用器和解復用器 3.3V WD BW 4 DIFF CH 2:1 MULTI/DEMUX SW RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| CBTL04082BBS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CBTL04082A/B is an 8-to-4 bidirectional differential channel multiplexer/demultiplexer switch for PCI Express Generation 2 (Gen2) applications. |
發(fā)布緊急采購，3分鐘左右您將得到回復。