參數(shù)資料
型號(hào): CAT1163J-30TE13
英文描述: Supervisory Circuit with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog Timer
中文描述: 監(jiān)控電路與I2C串行CMOS EEPROM的,精密復(fù)位控制器和看門(mén)狗定時(shí)器
文件頁(yè)數(shù): 6/12頁(yè)
文件大?。?/td> 69K
代理商: CAT1163J-30TE13
6
CAT1163
Doc. No. 3003, Rev. C
Any attempt to access the internal EEPROM is not
recognized and an ACK will not be sent on the SDA line
when RESET or
RESET
is active.
Reset Threshold Voltage
The CAT1163 is offered with five reset threshold voltage
ranges. They are 4.50-4.75V, 4.25-4.50V, 3.00-3.15V,
2.85-3.00V and 2.55-2.70V.
Hardware Data Protection
The CAT1163 is designed with the following hardware
data protection features to provide a high degree of data
integrity.
(1) The CAT1163 features a WP pin. When the WP pin
is tied high the entire memory array becomes write
protected (read only).
(2) The V
CC
sense provides write protection when V
CC
falls below the reset threshold value (VTH). The V
CC
lock
out inhibits writes to the serial EEPROM whenever V
CC
falls below (power down) VTH or until V
CC
reaches the
reset threshold (power up) V
TH
.
tHIGH
SCL
SDA IN
SDA OUT
tLOW
tF
tLOW
tR
tBUF
tSU:STO
tSU:DAT
tHD:DAT
tHD:STA
tSU:STA
tAA
tDH
Figure 2. Bus Timing
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
ACK
8TH BIT
BYTE n
SCL
SDA
Figure 3. Write Cycle Timing
START BIT
SDA
STOP BIT
SCL
Figure 4. Start/Stop Timing
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