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| 型號(hào)： | C9815DY |
| 英文描述： | Up to 5A ULDO linear regulator |
| 中文描述： | CPU系統(tǒng)時(shí)鐘發(fā)生器| SSOP封裝| 56PIN |塑料 |
| 文件頁(yè)數(shù)： | 8/19頁(yè) |
| 文件大?。?/td> | 328K |
| 代理商： | C9815DY |
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Low EMI Clock Generator for Intel
133MHz/2DIMM Chipset Systems
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07054 Rev. **
05/03/2001
Page 8 of 19
APPROVED PRODUCT
C9815
Serial Control Registers
NOTE:
The Pin# column lists the relevant pin number where applicable. The @Pup column gives the default state at
power up.
Following the acknowledge of the Address Byte, two additional bytes must be sent:
1)
“
Command Code
“
byte, and
2)
“
Byte Count
”
byte.
Although the data (bits) in these two bytes are considered
“
don
’
t care
”
; they must be sent and will be acknowledged.
After the Command Code and the Count bytes have been acknowledged, the sequence described below (Byte 0, Byte 1,
and Byte 2) will be valid and acknowledged.
Byte 0: CPU Clock Register
(1=Enable, 0=Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
1
1
1
Pin#
-
-
-
-
-
26
25
49
Description
Reserved
Reserved
Reserved
Reserved
Spread spectrum mode
DOT
USB
CPU2_ITP
Byte 2: PCI Clock Register
(1=Enable, 0=Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
1
1
1
1
1
1
1
0
Pin#
9
20
19
18
16
15
13
-
Description
3V66-2 (AGP)
PCI6
PCI5
PCI4
PCI3
PCI2
PCI1
Reserved
Byte 1: SDRAM Clock Register
(1=Enable, 0=Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
1
1
1
1
1
1
1
1
Pin#
36
37
39
40
42
43
45
46
Description
SDRAM7
SDRAM6
SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0
Byte 3: Reserved Register
Bit
@Pup
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Pin#
-
-
-
-
-
-
-
-
Description
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
0 = SDRAM runs at 100MHz
1= SDRAM runs at 133.3MHz
Byte 4: Reserved Register
Byte 5: SSCG Control Register
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
0
0
0
Pin#
-
-
-
-
-
-
-
-
Description
Spread Mode (0=down, 1=center)
Selects spread bandwidth. Ref. Table 4
Selects spread bandwidth. Ref. Table 4
Reserved
Reserved
Reserved
Reserved
Reserved
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