參數(shù)資料
型號: C9805CYB
英文描述: Quad line receivers
中文描述: CPU系統(tǒng)時鐘發(fā)生器
文件頁數(shù): 9/10頁
文件大?。?/td> 102K
代理商: C9805CYB
C9805
Low EMI Clock Generator for Pentium
II CPU Systems with Power Management
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571
http://www.imicorp.com
Rev 1.5
9/2/1999
Page 9 of 10
Crystal and Reference Oscillator Parameters
Characteristic
Symbol
Frequency
F
o
Tolerance
TC
TS
TA
Mode
OM
Pin Capacitance
CP
DC Bias Voltage
V
BIAS
Startup time
Ts
Load Capacitance
CL
Effective Series
resonant
resistance
Power Dissipation
DL
Shunt Capacitance
CO
X1 and X2 Load
CL
Min
12.00
-
-
-
-
Typ
Max
16.00
+/-100
+/- 100
5
-
Units
MHz
PPM
PPM
PPM
Conditions
14.31818
-
-
-
-
5
Vdd/2
-
20
-
Calibration Note 1
Stability (Ta -10 to +60C) note 1
Aging (first year @ 25C) note 1
Parallel Resonant
Capacitance of XIN and Xout pins
pF
V
μ
S
pF
0.3Vdd
-
-
-
0.7Vdd
30
-
40
Note 1
R1
Ohms
-
-
-
0.10
7
mW
pF
pF
Note 1
--
17
Internal crystal loading capacitors on
each pin (to ground)
For maximum accuracy,the total circuit loading capacitance should be equal to CL. This loading capacitance is the
effective capacitance across the crystal pins and includes the device pin capacitance (CP) in parallel with any circuit
traces, the clock generator and any onboard discrete load capacitors.
Typical trace capacitance, (< half inch) is 4 pF, Load to the crystal is therefore 2.0 pF
Clock generator internal pin capacitance of 36 pF, Load to the crystal is therefore 18.0 pF
the total parasitic capacitance would therefore be = 20.0 pF.(matching CL)
Note 1: It is recommended but not mandatory that a crystal meets these specifications.
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