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C8051F060/1/2/3
A
DVANCD
Advanced
Information
15.
FLASH MEMORY
The C8051F060/1/2/3 family includes 64k + 128 bytes of on-chip, reprogrammable FLASH memory for program
code and non-volatile data storage. The FLASH memory can be programmed in-system, a single byte at a time,
through the JTAG interface or by software using the MOVX write instructions. Once cleared to logic 0, a FLASH bit
must be erased to set it back to logic 1. The bytes would typically be erased (set to 0xFF) before being reprogrammed.
FLASH write and erase operations are automatically timed by hardware for proper execution; data polling to deter-
mine the end of the write/erase operation is not required. The CPU is stalled during write/erase operations while the
device peripherals remain active. Interrupts that occur during FLASH write/eraee operations are held, and are then
serviced in their priority order once the FLASH operation has completed. Refer to Table 15.1 for the electrical char-
acteristics of the FLASH memory.
15.1.
Programming The Flash Memory
The simplest means of programming the FLASH memory is through the JTAG interface using programming tools
provided by Cygnal or a third party vendor. This is the only means for programming a non-initialized device. For
details on the JTAG commands to program FLASH memory, see
Section “25. JTAG (IEEE 1149.1)” on page 301
.
The FLASH memory can be programmed from software using the MOVX write instruction with the address and data
byte to be programmed provided as normal operands. Before writing to FLASH memory using MOVX, FLASH write
operations must be enabled by setting the PSWE Program Store Write Enable bit (PSCTL.0) to logic 1. This directs
the MOVX writes to FLASH memory instead of to XRAM, which is the default target. The PSWE bit remains set
until cleared by software. To avoid errant FLASH writes, it is recommended that interrupts be disabled while the
PSWE bit is logic 1.
FLASH memory is read using the MOVC instruction. MOVX reads are always directed to XRAM, regardless of the
state of PSWE.
NOTE: To ensure the integrity of FLASH memory contents, it is strongly recommended that the on-chip VDD
monitor be enabled by connecting the VDD monitor enable pin (MONEN) to VDD in any system that writes
and/or erases FLASH memory from software. See “RESET SOURCES” on page 155 for more information.
A write to FLASH memory can clear bits but cannot set them; only an erase operation can set bits in FLASH.
A byte
location to be programmed must be erased before a new value can be written
. The 64k byte FLASH memory is
organized in 512-byte pages. The erase operation applies to an entire page (setting all bytes in the page to 0xFF). The
following steps illustrate the algorithm for programming FLASH from user software.
Step 1. Disable interrupts.
Step 2. Set FLWE (FLSCL.0) to enable FLASH writes/erases via user software.
Step 3. Set PSEE (PSCTL.1) to enable FLASH erases.
Step 4. Set PSWE (PSCTL.0) to redirect MOVX commands to write to FLASH.
Step 5. Use the MOVX command to write a data byte to any location within the 512-byte page to be erased.
Step 7. Use the MOVX command to write a data byte to the desired byte location within the erased 512-byte
page. Repeat this step until all desired bytes are written (within the target page).
Step 8. Clear the PSWE bit to redirect MOVX commands to the XRAM data space.
Step 9. Re-enable interrupts.