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參數(shù)資料
| 型號： | BT458LPJ80 |
| 英文描述： | Video DAC with Color Palette (RAMDAC) |
| 中文描述： | 視頻DAC的調(diào)色板（的RAMDAC） |
| 文件頁數(shù)： | 30/60頁 |
| 文件大小： | 647K |
| 代理商： | BT458LPJ80 |
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3.0 PC Board Layout Considerations
Bt457/Bt458
3.5 COMP Decoupling
125 MHz/135 MHz/165 MHz Monolithic CMOS 256 Color Palette RAMDAC
3-6
Conexant
L45801 Rev. N
3.5 COMP Decoupling
The COMP pin must be decoupled to VAA, typically with a 0.1 μF ceramic
capacitor. Low-frequency supply noise requires a larger value. The COMP
capacitor must be as close as physically possible to the COMP and VAA pins. A
surface-mount ceramic chip capacitor is preferred for minimal lead inductance,
which degrades the noise rejection of the circuit. Short, wide traces also reduce
lead inductance.
If the display has a ghosting problem, additional capacitance connected in
parallel with the COMP capacitor can help.
3.6 Digital Signal Interconnect
Digital inputs to the Bt457 and Bt458 should be isolated as much as possible from
the analog outputs and other analog circuitry. Also, these input signals should not
overlay the analog power and output signals.
Most noise on the analog outputs is caused by excessive edge rates (less than 3
ns), overshoot, undershoot, and ringing on the digital inputs.
The digital edge rates should be no faster than necessary, because feedthrough
noise is proportional to the digital edge rates. Lower speed applications benefit
from using lower speed logic (3
–
5 ns edge rates) to reduce data-related noise on
the analog outputs.
Transmission lines mismatch if the lines do not match the source and
destination impedance. This degrades signal fidelity if the line length reflection
time is greater than one fourth the signal edge time. Line termination or line
length reduction is the solution. For example, logic edge rates of 2 ns require line
lengths of less than four inches without using termination. Ringing can be
reduced by damping the line with a series resistor (30
–
300
).
Radiation of digital signals can also be picked up by the analog circuitry. This
is prevented by reducing the digital edge rates (rise/fall time), minimizing ringing
with damping resistors, and minimizing coupling through PC board capacitance
by routing the signals 90 degrees to any analog signals.
The clock driver and all other digital devices on the circuit board must be
adequately decoupled to prevent the noise generated by digital devices from
coupling into the analog circuitry.
相關(guān)PDF資料 |
PDF描述 |
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| BT457KG125 | Video DAC with Color Palette (RAMDAC) |
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| BT457KPJ110 | Video DAC with Color Palette (RAMDAC) |
| BT457KPJ125 | Video DAC with Color Palette (RAMDAC) |
| BT457KPJ80 | Video DAC with Color Palette (RAMDAC) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BT471KPJ35-695 | 制造商:BT 功能描述: |
| BT471KPJ80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| BT473KPJ110 | 制造商:BT 功能描述:Digital Analog Converter, Triple, 8 Bit, 68 Pin, PLCC |
| BT473KPJ110ES2 | 制造商:BT 功能描述:Digital Analog Converter, Triple, 8 Bit, 68 Pin, PLCC |
| BT473KPJ110-ES2 | 制造商:BT 功能描述:Digital Analog Converter, Triple, 8 Bit, 68 Pin, PLCC |
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