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參數(shù)資料
| 型號(hào)： | BH16821ADGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State |
| 中文描述： | ABT SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | PLASTIC, TSSOP2-56 |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大小： | 80K |
| 代理商： | BH16821ADGG |
Philips Semiconductors
Product specification
74ABT16821A
74ABTH16821A
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
1998 Feb 27
3
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
1OE
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
GND
V
CC
GND
1Q7
1Q8
1Q9
2Q0
2Q1
2Q2
GND
2Q3
2Q4
2Q5
V
CC
2Q6
2Q7
GND
2Q8
2Q9
2OE
1CP
1D0
1D1
GND
1D2
1D3
V
CC
1D4
1D5
1D6
GND
1D7
1D8
1D9
2D0
2D1
2D2
GND
2D3
2D4
2D5
V
CC
2D6
2D7
GND
2D8
2D9
2CP
SH00001
LOGIC SYMBOL
1D0 1D1 1D2 1D3 1D4 1D5 1D6
1D7
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6
1Q7
1D8
1D9
1Q8
1Q9
2D0 2D1 2D2 2D3 2D4 2D5 2D6
2D7
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6
2Q7
2D8
2D9
2Q8
2Q9
56
54
52
51
49
48
47
45
44
43
56
1
29
28
2
3
5
6
8
9
10
12
13
14
42
41
40
38
37
36
34
33
31
30
15
16
17
19
20
21
23
24
26
27
SH00002
1CP
1OE
2CP
2OE
LOGIC SYMBOL (IEEE/IEC)
EN2
2
C1
EN4
C3
1D
4
3D
SH00003
1
56
28
29
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
2
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
26
27
1OE
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
1Q8
1Q9
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
2Q8
2Q9
2OE
1CP
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
1D8
1D9
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2D8
2D9
2CP
FUNCTION TABLE
INPUTS
INTERNAL
REGISTER
OUTPUTS
OPERATING
MODE
nOE
nCP
nDx
nQ0 - nQ9
L
L
↑
↑
↑
↑
↑
l
h
L
H
L
H
Load and read
register
L
X
NC
NC
Hold
H
H
X
Dn
NC
Dn
Z
Z
Disable
outputs
H =
h
High voltage level
High voltage level one set-up time prior to the Low-to-High
clock transition
Low voltage level
Low voltage level one set-up time prior to the Low-to-High
clock transition
No change
Don’t care
High impedance “off” state
Low to High clock transition
Not a Low-to-High clock transition
=
L
l
=
=
NC=
X =
Z =
↑
=
↑
=
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BH16821ADL | 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State |
| BH16823ADGG | 18-bit bus interface D-type flip-flop with reset and enable 3-State |
| BH16823ADL | 18-bit bus interface D-type flip-flop with reset and enable 3-State |
| BH16825ADGG | 18-bit buffer/line driver; non-inverting 3-State |
| BH16825ADL | 18-bit buffer/line driver; non-inverting 3-State |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BH16821ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State |
| BH16823ADGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit bus interface D-type flip-flop with reset and enable 3-State |
| BH16823ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit bus interface D-type flip-flop with reset and enable 3-State |
| BH16825ADGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit buffer/line driver; non-inverting 3-State |
| BH16825ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit buffer/line driver; non-inverting 3-State |
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