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參數(shù)資料
| 型號： | BH16260DGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 12-bit to 24-bit multiplexed D-type latches 3-State |
| 中文描述： | ABT SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| 封裝： | PLASTIC, TSSOP2-56 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 79K |
| 代理商： | BH16260DGG |
Philips Semiconductors
Product specification
74ABT16260
74ABTH16260
12-bit to 24-bit multiplexed D-type latches (3-State)
2
1998 Feb 10
853-2048-18945
FEATURES
ESD protection exceeds 2000V per Mil-Std-883C, Method 3015;
exceeds 200V using machine model (C = 200pF, R = 0).
Latch-up performance exceeds 500mA per JEDEC Standard
JESD-17.
Distributed V
CC
and GND pin configuration minimizes high-speed
switching noise.
Flow-through architecture optimizes PCB layout.
High-drive outputs (–32mA I
OH
, 64mA I
OL
).
74ABTH16260 incorporates bus-hold inputs which eliminate the
need for external pull-up resistors.
Package options:
–
56-pin plastic Shrink Small-Outline Package (SSOP)
–
56-pin plastic Thin Shrink Small-Outline Package (TSSOP)
DESCRIPTION
The 74ABT16260/74ABTH16260 is a 12-bit to 24-bit multiplexed
D-type latch used in applications where two separate data paths
must be multiplexed onto, or demultiplexed from, a single data path.
Typical applications include multiplexing and/or demultiplexing of
address and data information in microprocessor or bus-interface
applications. This device is alto useful in memory-interleaving
applications.
Three 12-bit I/O ports (A1–A12, 1B1–1B12, and 2B1–2B12) are
available for address and/or data transfer. The output enable (OE1B,
OE2B, and OEA) inputs control the bus transceiver functions. The
OE1B and OE2B control signals also allow bank control in the A to
B direction.
Address and/or data information can be stored using the internal
storage latches. The latch enable (LE1B, LE2B, LEA1B, and
LEA2B) inputs are used to control data storage. When the latch
enable input is high, the latch is transparent. When the latch enable
input goes low, the data present at the inputs is latched and remains
latched until the latch enable input is returned high.
To ensure the high-impedance state during power-up or
power-down, OE should be tied to V
CC
through a pull-up resistor;
the minimum value of the resistor is determined by the current
sinking capability of the driver.
The 74ABTH incorporates the bus hold feature. The 74ABT does
not include bus hold feature. Both parts are available in 56-pin
SSOP and TSSOP.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
Propagation delay
C = 50 pF
2.8
ns
nAx to nBx nBx to nAx
2.5
Input capacitance
V
I
= 0 V or V
CC
V
I/O
= 0 V or 5.0 V
Outputs disabled
4
pF
Output capacitance
6
pF
Total supply current
100
μ
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
74ABT16260 DL
BT16260 DL
SOT371-1
56-Pin Plastic TSSOP Type II
74ABT16260 DGG
BT16260 DGG
SOT364-1
56-Pin Plastic SSOP Type III
74ABTH16260 DL
BH16260 DL
SOT371-1
56-Pin Plastic TSSOP Type II
74ABTH16260 DGG
BH16260 DGG
SOT364-1
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21
An
Data inputs/outputs (A)
23, 24, 26, 31, 33, 34, 36, 37, 38, 40, 41, 42
1Bn
Data inputs/outputs (B1)
6, 5, 3, 54, 52, 51, 49, 48, 47, 45, 44, 43
2Bn
Data inputs/outputs (B2)
1, 29, 56
OEA, OE1B, OE2B
Output enable input (active low)
2, 27, 30, 55
LE1B, LE2B, LEA1B, LEA2B
Latch enable inputs
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相關(guān)代理商/技術(shù)參數(shù) |
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| BH16260DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:12-bit to 24-bit multiplexed D-type latches 3-State |
| BH16273DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit D-type flip-flop |
| BH16273DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit D-type flip-flop |
| BH162827ADGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-bit buffer/line driver, non-inverting,with 30ohm termination resistors (3-State) |
| BH162827ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-bit buffer/line driver, non-inverting,with 30ohm termination resistors (3-State) |
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