參數(shù)資料
型號(hào)： BCM5802
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP144
封裝： 28 X 28 MM, QFP-144
文件頁(yè)數(shù)： 41/41頁(yè)
文件大小： 571K
代理商： BCM5802
Production Specification
■ BCM5802
07/03/02
B roa dcom Co rpo rat ion
Document
5802-DS03-R
Functional Description
Page 1
Sect ion 1 : F un cti o n a l Descrip t io n
OVERVIEW
This document describes the BCM5802 security processor. The BCM5802 provides high-performance, low-cost IPsec/IKE/
SSL/TLS security. The device is especially attractive for high-volume, cost-sensitive access products and telecommuter
solutions running over xDSL, cable modem, T1 line, T3 line, and 10/100 Mb ethernet interfaces.
KEY FEATURES AND STATISTICS
The feature set of the BCM5802 is optimized to enable cryptographic acceleration for protocols such as IPsec and IKE/
SSL/TLS acceleration. High in-system performance, low system cost and ease of software development are key goals of
the BCM5802. The following table lists the key features and statistics of the BCM5802.
STREAMLINED HARDWARE INTERFACE
Direct connect to 32-bit PCI 2.2 bus running at 25-33 MHz, 3.3V, or 5V PCI
Zero external components: no external memory, no clock chips/oscillators, no EEPROM
Ideally suited for a shared PCI bus: latency-tolerant design, programmable burst size
Table 1:
BCM5802 Key Features and Statistics
Supply
3.3V supply, 3.3V-driven, and 5V-tolerant I/O.
Engine throughput, 3DES + MD5/SHA1
>150 Mbps, all features on.
System throughput, 3DES+MD5/SHA1
100 Mbps.
System throughput, DH (1024b Mod, 180b Exp)
30 key setup/s.
System throughput, DSA
(1024b public key, 160b private key)
50 signing/s and 25 verification/s.
System throughput, 1024-bit RSA
20 private key operation/s.
External memory usage
No additional memory required.
External clock supply
No additional clock required. The chip is driven by PCI clock.
External bus
PCI 2.2, 25-33 MHz, 32-bit, 3.3V, and 5V.
Package
144-pin DQFP.
Technology
0.35 m, 5LM standard-cell logic process.
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