
■ BCM5802
Production Specification
07/03/02
B roa dcom Co rpo rat ion
Page 2
Key Features and Statistics
Document
5802-DS03-R
IETF IPSEC COMPLIANT ACCELERATION
3DES CBC encryption and decryption in accordance with FIPS 46-3 and FIPS 81.
HMAC-MD5-96 and HMAC-SHA1-96 authentication in accordance with RFC2403, RFC2404 and FIPS 180-1.
Automatic generation of MD5/SHA1 padding.
Single-pass encryption and authentication via pipelined application of algorithms over payload in accordance with
RFC2402 and RFC2406.
Automatic sequencing of encryption and authentication: Encrypt first for outbound packets, authenticate first for
inbound packets in accordance with RFC2401.
IETF IKE
768-bit and 1024-bit Diffie-Hellman key generations for IKE handshake according to RFC2409
512-bit, 768-bit and 1024-bit RSA signing and verification for IKE handshake
1024-bit DSA signing and verification for IKE handshake according to FIPS 186-2
True random number generation for IKE keys using on-chip random number generator
SECURE SOCKET LAYER (SSL) V 3.0, TRANSPORT LAYER SECURITY (TLS)
512-bit, 768-bit, and 1024-bit RSA public key and private key processing
512-bit, 768-bit, and 1024-bit Diffe-Hellman session key generation
DES and Triple-DES bulk encryption capability
1024-bit DSA signing and verification
HMAC-MD5/SHA1 bulk authentication according to RFC2104
STREAMLINED, FLEXIBLE SOFTWARE COMMAND AND PACKET INTERFACE
Flexible command interface allows exchange of multiple packets or public key setups with one PCI write
Zero latency command buffer switching via double-buffered master command register
Support for big and little endian environments
Host CPU intervention not required between packets or between key setups
Intelligent, autonomous DMA descriptor based interface to minimize software load
Scatter/Gather support to eliminate packet data or key setup data copying
–handles fragmented data directly
Support for any number of IPsec security association contexts, limited only by system memory
ADDITIONAL PERFORMANCE ENHANCING FEATURES
Latency-tolerant design optimized for shared PCI bus environments. The BCM5802 leverages PCI burst mode access
capability, up to a maximal burst size of 64 bytes.
Aggressive pre-fetch of command and packet data.
Full performance is maintained independent of any reasonable PCI latency.
ADVANCED TESTABILITY FEATURES
100% testability of on-chip RAM cells via BIST circuitry
JTAG boundary scan for board-level testing